Patents by Inventor Jakob Huber

Jakob Huber has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9741816
    Abstract: A method for manufacturing an electrical device is disclosed. In an embodiment, the method includes providing a first layer of a first conductivity type, providing an intrinsic layer onto the first layer, providing one or more trenches into the intrinsic layer, filling the one or more trenches with a material of a second conductivity type opposite to the first conductivity type, and providing a second layer of a second conductivity type onto the intrinsic layer.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: August 22, 2017
    Assignee: Infineon Technologies AG
    Inventor: Jakob Huber
  • Publication number: 20160240628
    Abstract: A method for manufacturing an electrical device is disclosed. In an embodiment, the method includes providing a first layer of a first conductivity type, providing an intrinsic layer onto the first layer, providing one or more trenches into the intrinsic layer, filling the one or more trenches with a material of a second conductivity type opposite to the first conductivity type, and providing a second layer of a second conductivity type onto the intrinsic layer.
    Type: Application
    Filed: April 26, 2016
    Publication date: August 18, 2016
    Inventor: Jakob Huber
  • Patent number: 9379257
    Abstract: An electrical device includes a first layer, a second layer and an intrinsic layer. The first layer is of a first conductivity type, wherein the second layer is of a second conductivity type opposite to the first conductivity type. The intrinsic layer is arranged between the first and the second layer and has a reduced thickness at at least one portion. An area of the at least one portion is less than 50% of an active area in which the first and second layer face each other.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: June 28, 2016
    Assignee: Infineon Technologies AG
    Inventor: Jakob Huber
  • Publication number: 20130341621
    Abstract: An electrical device includes a first layer, a second layer and an intrinsic layer. The first layer is of a first conductivity type, wherein the second layer is of a second conductivity type opposite to the first conductivity type. The intrinsic layer is arranged between the first and the second layer and has a reduced thickness at at least one portion. An area of the at least one portion is less than 50% of an active area in which the first and second layer face each other.
    Type: Application
    Filed: June 22, 2012
    Publication date: December 26, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventor: Jakob Huber
  • Publication number: 20100073978
    Abstract: A bridge rectifier circuit including a first and second pair of bipolar transistors, wherein the bipolar transistors of each pair have conductivity types that are opposite from one another; first and second input terminals coupled to each of the bipolar transistors; and first and second output terminals coupled to each of the bipolar transistors. Furthermore, each of the bipolar transistors is configured to operate in reverse-active mode.
    Type: Application
    Filed: September 25, 2008
    Publication date: March 25, 2010
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Josef Paul Schaffer, Jakob Huber, Hermann Seitz
  • Patent number: 7622790
    Abstract: A transistor assembly having a transistor includes a plurality of transistor regions, each of which has a vertical transistor structure having a collector semiconductor region, a base semiconductor region and an emitter semiconductor region, emitter contacting regions arranged above the transistor regions and base contacting regions connected to the base semiconductor regions via a polycrystalline semiconductor layer, wherein the polycrystalline semiconductor layer is structured such that the base contacting regions of transistor regions which are not part of the transistor are electrically isolated from base contacting regions of transistor regions which are part of the transistor.
    Type: Grant
    Filed: May 11, 2005
    Date of Patent: November 24, 2009
    Assignee: Infineon Technologies AG
    Inventor: Jakob Huber
  • Patent number: 7176128
    Abstract: A method for producing a contact structure on a structured surface comprising producing a first conductive layer on the structured surface, wherein the first conductive layer comprising tungsten. A conductive seed layer is produced on the first conductive layer, the contact structure being produced by electroplating on the seed layer. The first conductive layer serves as an etch stop for selectively removing substrate material from the backside.
    Type: Grant
    Filed: January 12, 2004
    Date of Patent: February 13, 2007
    Assignee: Infineon Technologies AG
    Inventors: Carsten Ahrens, Jakob Huber, Uwe Seidel
  • Publication number: 20050263851
    Abstract: A transistor assembly having a transistor includes a plurality of transistor regions, each of which has a vertical transistor structure having a collector semiconductor region, a base semiconductor region and an emitter semiconductor region, emitter contacting regions arranged above the transistor regions and base contacting regions connected to the base semiconductor regions via a polycrystalline semiconductor layer, wherein the polycrystalline semiconductor layer is structured such that the base contacting regions of transistor regions which are not part of the transistor are electrically isolated from base contacting regions of transistor regions which are part of the transistor.
    Type: Application
    Filed: May 11, 2005
    Publication date: December 1, 2005
    Applicant: Infineon Technologies AG
    Inventor: Jakob Huber
  • Patent number: 6949799
    Abstract: A semiconductor structure including a substrate, a device layer and a contact arranged on the substrate, comprises an ESD protective means, arranged between the substrate and the contact, such, that in the ESD case a breakthrough from the ESD protective means to the contact occurs.
    Type: Grant
    Filed: May 10, 2002
    Date of Patent: September 27, 2005
    Assignee: Infineon Technologies AG
    Inventors: Klaus Diefenbeck, Klaus Gnannt, Jakob Huber, Ulrich Krumbein
  • Publication number: 20050153546
    Abstract: A method for producing a contact structure on a structured surface comprising producing a first conductive layer on the structured surface, wherein the first conductive layer comprising tungsten. A conductive seed layer is produced on the first conductive layer, the contact structure being produced by electroplating on the seed layer. The first conductive layer serves as an etch stop for selectively removing substrate material from the backside.
    Type: Application
    Filed: January 12, 2004
    Publication date: July 14, 2005
    Inventors: Carsten Ahrens, Jakob Huber, Uwe Seidel
  • Patent number: 6888226
    Abstract: A semiconductor structure includes a base layer of a first conductivity type, a first layer of the first conductivity type arranged on the base layer and having a dopant concentration that is lower than a dopant concentration of the base layer, and a second layer of a second conductivity type being operative with the first layer in order to form a transition between the first conductivity type and the second conductivity type. A course of a dopant profile at the transition between the base layer and the first layer is set such that in an ESD case a space charge region shifted to the transition between the base layer and the first layer reaches into the base layer.
    Type: Grant
    Filed: May 24, 2002
    Date of Patent: May 3, 2005
    Assignee: Infineon Technologies AG
    Inventors: Klaus Diefenbeck, Christian Herzum, Jakob Huber, Karlheinz Müller
  • Publication number: 20040267360
    Abstract: An alloplastic ligament has a surface covered by titanium or aluminum oxide ceramic, or by zirconium oxide ceramic or by tantalum, so that the synthetic material of the ligament is not in direct contact with the surrounding body environment. A ligament prosthesis, in particular an artificial cruciate ligament, has ends for securing the alloplastic ligament to the bone, in particular to the femur and the tibia, by a hollow screw of self-cutting outer screw threads for screwing into the bone and with inner screw threads. A sleeve having outer screw threads for screwing into the hollow screw and with a securement of the ligament end on the sleeve is also provided.
    Type: Application
    Filed: May 21, 2004
    Publication date: December 30, 2004
    Inventor: Jakob Huber
  • Patent number: 6806555
    Abstract: A semiconductor component and a method for fabricating it includes a substrate and an epitaxial layer situated thereon and integrating at least a first and a second bipolar component in the layer. The first and second bipolar components have a buried layer and different collector widths. The buried layer of the second component has a larger layer thickness than that of the first component; exactly one epitaxial layer is provided. The different collector widths produced as a result thereof are influenced by the outdiffusion of the dopant of the buried layers by other substances.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: October 19, 2004
    Assignee: Infineon Technologies AG
    Inventors: Jakob Huber, Wolfgang Klein
  • Publication number: 20040201044
    Abstract: A semiconductor structure includes a base layer of a first conductivity type, a first layer of the first conductivity type arranged on the base layer and having a dopant concentration that is lower than a dopant concentration of the base layer, and a second layer of a second conductivity type being operative with the first layer in order to form a transition between the first conductivity type and the second conductivity type. A course of a dopant profile at the transition between the base layer and the first layer is set such that in an ESD case a space charge region shifted to the transition between the base layer and the first layer reaches into the base layer.
    Type: Application
    Filed: May 26, 2004
    Publication date: October 14, 2004
    Inventors: Klaus Diefenbeck, Christian Herzum, Jakob Huber, Karlheinz Muller
  • Publication number: 20040169229
    Abstract: semiconductor structure having an ESD protective means A semiconductor structure including a substrate (102), a device layer (104) and a contact (108) arranged on the substrate (102), comprises an ESD protective means (144a, 144b), arranged between the substrate (102) and the contact (108), such, that in the ESD case a breakthrough from the ESD protective means (144a, 144b) to the contact (108) occurs.
    Type: Application
    Filed: April 23, 2004
    Publication date: September 2, 2004
    Inventors: Klaus Diefenbeck, Klaus Gnannt, Jakob Huber, Ulrich Krumbein
  • Publication number: 20020158308
    Abstract: A semiconductor component and a method for fabricating it includes a substrate and an epitaxial layer situated thereon and integrating at least a first and a second bipolar component in the layer. The first and second bipolar components have a buried layer and different collector widths. The buried layer of the second component has a larger layer thickness than that of the first component; exactly one epitaxial layer is provided. The different collector widths produced as a result thereof are influenced by the outdiffusion of the dopant of the buried layers by other substances.
    Type: Application
    Filed: May 13, 2002
    Publication date: October 31, 2002
    Inventors: Jakob Huber, Wolfgang Klein
  • Patent number: 5965929
    Abstract: A bipolar silicon transistor includes at least one emitter zone with n.sup.+ arsenic doping and with a phosphorus doping. The ratio between arsenic dopant concentration and phosphorus dopant concentration is between 10:1 and 500:1 in the at least one emitter zone. The at least one emitter zone may also have a penetration depth of less than 0.5 .mu.m. A method for producing a bipolar silicon transistor includes implanting a n.sup.+ -doped emitter zone with arsenic, implanting the n.sup.+ -doped emitter zone with phosphorus, setting a ratio in the n.sup.+ -doped emitter zone between the arsenic dopant concentration and phosphorus dopant concentration to between 10:1 and 500:1, and annealing crystal defects.
    Type: Grant
    Filed: March 27, 1996
    Date of Patent: October 12, 1999
    Assignee: Siemens Aktiengesellschaft
    Inventors: Klaus Gnannt, Jakob Huber
  • Patent number: 5819837
    Abstract: Metal is melted in an induction-heated crucible (13) on which a mold (10) with a downward-facing filling opening (26) is located in the melting position. After melting the metal, the crucible (13) and the mold (10) are jointly rotated about a horizontal axis (A--A) into a tilting position in which the molten material flows from the crucible (13) into the mold (10). In order to melt reactive metals, melting is done in a crucible (13) that is surrounded by a vacuum, this crucible being surrounded by an induction coil (15) outside of the vacuum. The mold (10) is located in a vacuum-sealed casting chamber (6) which is evacuated together with the crucible (13) prior to melting and casting is carried out by a joint tilting of the crucible (13), casting chamber (6) and mold (10) by at least 180 degrees while the vacuum is maintained.
    Type: Grant
    Filed: March 3, 1997
    Date of Patent: October 13, 1998
    Assignee: ALD Vacuum Technologies GmbH
    Inventors: Franz Hugo, Jakob Huber, Robert Y. Abramson, John Sheehan
  • Patent number: 5803936
    Abstract: A gasification reactor comprising of a slow turning rotation chamber (1) with tapered end pieces (7) and sealed by stationary closures (8, 9). The chamber is divided by rings (3, 3') into three sections (4, 5, 6). The first section (4) is used to dry and pre-heat the combustible material (12). Section (5) is the gasification zone and section (6) is used to collect and transport the ash to the outside of the chamber. In order to obtain a better insulation against loss of heat an inner cylinder (24) is fitted into the chamber. The feed stock material (12) is brought into the chamber with a hollow piston (13) through the stationary closure (8) and inside the chamber the material is moved along by the rotation of the chamber. Fresh air supply is introduced into the chamber through special form parts (25), and the combustible gas is collected and returned to the outside with the pipe (31). Ash and slag are lifted and deposited in a collector (21) from where they are brought to the outside.
    Type: Grant
    Filed: September 26, 1996
    Date of Patent: September 8, 1998
    Inventor: Jakob Huber
  • Patent number: 5626288
    Abstract: A method and apparatus for ventilating an enclosed air space, such as the crawl space under a building, and which includes a controller which is switchable between a cooling mode which activates a ventilating fan upon the temperature in the space reaching a predetermined upper limit and the differential of the temperatures inside and outside of the space reaching a predetermined value, and a heating mode which activates the ventilating fan upon the temperature in the space reaching a predetermined lower limit and the differential of the temperatures inside and outside of the space reaching a predetermined value. The ventilating fan may also be activated by the presence of predetermined concentrations of dangerous or destructive gases, such as radon and water vapor.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: May 6, 1997
    Inventor: Jakob Huber