Abstract: A novel system that allows for 3D radar detection that simultaneously captures the lateral and depth features of a target is disclosed. This system uses only a single transceiver, a set of delay-lines, and a passive antenna array, all without requiring mechanical rotation. By using the delay lines, a set of beat frequencies corresponding to the target presence can be generated in continuous wave radar systems. Likewise, in pulsed radar systems, the delays also allow the system to determine the 3D aspects of the target(s). Compared to existing solutions, the invention, in embodiments, allows for the implementation of simple, reliable, and power efficient 3D radars.

Abstract: An illustrative digital latch includes: a differential transistor pair (“track pair”) capacitively coupled to a differential input signal to cause a differential output voltage between output nodes to track the differential input signal when a clock signal is asserted; a cross-coupled transistor pair (“latch pair”) coupled to the output nodes to latch the differential output voltage when the clock signal is de-asserted; a differential transistor pair (“clock pair”) that steers a bias current between the track pair and the latch pair; and a matched set of bias transistors that determines the bias current for the clock pair and a reference voltage on a reference voltage node, the reference voltage node being coupled to a base of each transistor in the track pair by equal bias resistances.

Abstract: Embodiments of methods and apparatuses may provide the capability to extend the tuning range of a VCO in a way that does not degrade VCO circuit performance. For example, the parasitic capacitance of semiconductor devices in the VCO circuit may be utilized to extend the tuning range of a VCO without significant degradation of VCO circuit performance. For example, in an embodiment, a method voltage-control of an oscillator may comprise receiving a first signal for control of a frequency of an output signal from the oscillator, deriving a second signal from the first signal, controlling the frequency of the output signal from the oscillator using the first signal, and extending a frequency range of the oscillator using the second signal.

Abstract: A novel system that allows for 3D radar detection that simultaneously captures the lateral and depth features of a target is disclosed. This system uses only a single transceiver, a set of delay-lines, and a passive antenna array, all without requiring mechanical rotation. By using the delay lines, a set of beat frequencies corresponding to the target presence can be generated in continuous wave radar systems. Likewise, in pulsed radar systems, the delays also allow the system to determine the 3D aspects of the target(s). Compared to existing solutions, the invention, in embodiments, allows for the implementation of simple, reliable, and power efficient 3D radars.

Abstract: Embodiments of methods and apparatuses may provide the capability to extend the tuning range of a VCO in a way that does not degrade VCO circuit performance. For example, the parasitic capacitance of semiconductor devices in the VCO circuit may be utilized to extend the tuning range of a VCO without significant degradation of VCO circuit performance. For example, in an embodiment, a method voltage-control of an oscillator may comprise receiving a first signal for control of a frequency of an output signal from the oscillator, deriving a second signal from the first signal, controlling the frequency of the output signal from the oscillator using the first signal, and extending a frequency range of the oscillator using the second signal.

Abstract: An electrical circuit includes: at least one inductor, at least one varactor, and at least two transistors, all of which electrically arranged to form a voltage controlled oscillator (VCO) having an oscillation frequency; wherein the at least two transistors includes a first transistor and a second transistor; wherein the first transistor has a first bulk terminal and a first parasitic diode disposed between the first bulk terminal and the first transistor; wherein the second transistor has a second bulk terminal and a second parasitic diode disposed between the second bulk terminal and the second transistor; wherein application of a first control voltage to the first bulk terminal, application of a second control voltage to the second bulk terminal, or application of first and second control voltages to the first and second bulk terminals, respectively, is effective to change the oscillation frequency of the VCO.

Abstract: An electrical circuit includes: at least one inductor, at least one varactor, and at least two transistors, all of which electrically arranged to form a voltage controlled oscillator (VCO) having an oscillation frequency; wherein the at least two transistors includes a first transistor and a second transistor; wherein the first transistor has a first bulk terminal and a first parasitic diode disposed between the first bulk terminal and the first transistor; wherein the second transistor has a second bulk terminal and a second parasitic diode disposed between the second bulk terminal and the second transistor; wherein application of a first control voltage to the first bulk terminal, application of a second control voltage to the second bulk terminal, or application of first and second control voltages to the first and second bulk terminals, respectively, is effective to change the oscillation frequency of the VCO.

Abstract: An electrical circuit includes: at least one inductor, at least one varactor, and at least two transistors, all of which electrically arranged to form a voltage controlled oscillator (VCO) having an oscillation frequency; wherein the at least two transistors includes a first transistor and a second transistor; wherein the first transistor has a first bulk terminal and a first parasitic diode disposed between the first bulk terminal and the first transistor; wherein the second transistor has a second bulk terminal and a second parasitic diode disposed between the second bulk terminal and the second transistor; wherein application of a first control voltage to the first bulk terminal, application of a second control voltage to the second bulk terminal, or application of first and second control voltages to the first and second bulk terminals, respectively, is effective to change the oscillation frequency of the VCO.

Abstract: A system includes: a phase frequency detector (PFD) having an output switchably connectable and disconnectable to a first signal path via a first switch, and switchably connectable and disconnectable to a second signal path via a second switch; a first filter disposed in the first signal path; a second filter disposed in the second signal path; and, a voltage controlled oscillator (VCO) operatively coupled to the first signal path downstream of the first filter, and operatively coupled to the second signal path downstream of the second filter. The VCO includes: a capacitive device or a current controlling device operatively coupled to the first signal path; and, a bulk terminal operatively coupled to the second signal path.

Abstract: Described is a linear and symmetric time-to-digital converter (TDC) which comprises: a first input; a second input; a first delay line having a plurality of delay stages coupled together in series, the first delay line to receive the first input; a second delay line having a plurality of delay stages coupled together in series, the second delay line to receive the second input; and a plurality of comparators, each having first and second outputs coupled to the first and second delay lines.

Abstract: Described is a linear and symmetric time-to-digital converter (TDC) which comprises: a first input; a second input; a first delay line having a plurality of delay stages coupled together in series, the first delay line to receive the first input; a second delay line having a plurality of delay stages coupled together in series, the second delay line to receive the second input; and a plurality of comparators, each having first and second outputs coupled to the first and second delay lines.