Abstract: A system includes a capacitive transducer, an excitation circuit, and a measuring circuit. The excitation circuit is configured to excite the capacitive transducer and the measuring circuit measures an output signal from the capacitive transducer responsive to the excitation voltage. The excitation circuit includes a voltage source for providing a first voltage in response to receipt of a supply voltage, a voltage generator coupled to the voltage source for receiving the first voltage and generating a second voltage that is greater than the supply voltage, and a control circuit coupled to the voltage source and the voltage generator. The control circuit is configured to provide any of a system ground, the first voltage, and the second voltage to first and second terminals of the capacitive transducer, and particularly, being configured to apply the system ground and the second voltage in the form of two consecutive stimuli with opposite polarities.

Abstract: A method for voltage regulation includes reducing a power consumption of a voltage regulator during an IDLE phase, by disabling a feedback loop configured to regulate an internal voltage to a multiple of a reference voltage in response to the voltage regulator receiving a digital signal from a digital circuit. The internal voltage is proportional to an external voltage supplied to the digital circuit. A regulated accuracy of the external voltage is increased during a MEASUREMENT phase by enabling the feedback loop in response to the voltage regulator receiving the digital signal from the digital circuit.

Abstract: A method for voltage regulation includes reducing a power consumption of a voltage regulator during an IDLE phase, by disabling a feedback loop configured to regulate an internal voltage to a multiple of a reference voltage in response to the voltage regulator receiving a digital signal from a digital circuit. The internal voltage is proportional to an external voltage supplied to the digital circuit. A regulated accuracy of the external voltage is increased during a MEASUREMENT phase by enabling the feedback loop in response to the voltage regulator receiving the digital signal from the digital circuit.

Abstract: A system includes a capacitive transducer, an excitation circuit, and a measuring circuit. The excitation circuit is configured to excite the capacitive transducer and the measuring circuit measures an output signal from the capacitive transducer responsive to the excitation voltage. The excitation circuit includes a voltage source for providing a first voltage in response to receipt of a supply voltage, a voltage generator coupled to the voltage source for receiving the first voltage and generating a second voltage that is greater than the supply voltage, and a control circuit coupled to the voltage source and the voltage generator. The control circuit is configured to provide any of a system ground, the first voltage, and the second voltage to first and second terminals of the capacitive transducer, and particularly, being configured to apply the system ground and the second voltage in the form of two consecutive stimuli with opposite polarities.

Abstract: An on-board trimming circuit suitable for trimming an accelerometer provides offset trim and gain trim modules for determining correct trim codes for subsequent programming into the trimming circuit. The correct trim codes may be determined by comparing sensor outputs which have been adjusted by successive trim codes, with a reference voltage in a comparator until the comparator toggles or by using a successive approximation technique. The reference voltage is supplied form a tap of a feedback resistance divider circuit which forms a part of an on-board voltage reference generator which may be used to provide a full scale reference for an analog to digital converter which converts a sensor output voltage into a digital signal. Using these reference voltages significantly lessens the impact of any offsets inherent in the voltage reference generator on the trimming process.

Abstract: A voltage regulator for digital loads combines a closed loop regulation circuit with an open loop topology. A transistor and a bank of transistors share the same voltage source VDD and gate control current. Each of the bank of transistors is sized to match different current load requirements and one or more may be switched in or out as appropriate when the digital load transitions from one operating mode to another. The regulator has good DC load regulation and unconditional stability regardless of output capacitance.

Abstract: A low drop-out voltage regulator, an integrated circuit, a sensor and a method of providing a regulated voltage are provided. The low drop-out voltage regulator comprises a regulated voltage driver for providing the regulated voltage in response to a control voltage, a feedback-loop circuit for generating the control signal such that the regulated voltage driving circuit provides the regulated voltage, and a pull-up circuit for pulling up the regulated voltage to a supply voltage when a difference between the supply voltage and the control voltage is smaller than a predetermined threshold value. In the feedback-loop circuit a first feedback voltage or a second feedback voltage is generated, respectively, on basis of a first ratio and a second ratio between the feedback voltage and the regulated voltage. The second feedback voltage is generated instead of the first feedback voltage when the regulated voltage is pulled-up to the supply voltage.

Abstract: An on-board trimming circuit suitable for trimming an accelerometer provides offset trim and gain trim modules for determining correct trim codes for subsequent programming into the trimming circuit. The correct trim codes may be determined by comparing sensor outputs which have been adjusted by successive trim codes, with a reference voltage in a comparator until the comparator toggles or by using a successive approximation technique. The reference voltage is supplied form a tap of a feedback resistance divider circuit which forms a part of an on-board voltage reference generator which may be used to provide a full scale reference for an analog to digital converter which converts a sensor output voltage into a digital signal. Using these reference voltages significantly lessens the impact of any offsets inherent in the voltage reference generator on the trimming process.

Abstract: A low drop-out voltage regulator, an integrated circuit, a sensor and a method of providing a regulated voltage are provided. The low drop-out voltage regulator comprises a regulated voltage driver for providing the regulated voltage in response to a control voltage, a feedback-loop circuit for generating the control signal such that the regulated voltage driving circuit provides the regulated voltage, and a pull-up circuit for pulling up the regulated voltage to a supply voltage when a difference between the supply voltage and the control voltage is smaller than a predetermined threshold value. In the feedback-loop circuit a first feedback voltage or a second feedback voltage is generated, respectively, on basis of a first ratio and a second ratio between the feedback voltage and the regulated voltage. The second feedback voltage is generated instead of the first feedback voltage when the regulated voltage is pulled-up to the supply voltage.

Abstract: A continuous time sigma delta converter has a filter and converter components having known non-ideal characteristics. A compensation circuit has error modelling components arranged to model the non-ideal characteristics of the converter. A summation block combines a compensation signal from the compensation circuit with a non-ideal output signal from the converter in order to provide a compensated output signal. This has substantially no effect on other modulator performance characteristics and contributes to the implementation of giga sample-per-second Continuous Time sigma deltas having the dynamic range capabilities of traditional DT sigma deltas.

Abstract: A continuous time sigma delta converter has a filter and converter components having known non-ideal characteristics. A compensation circuit has error modelling components arranged to model the non-ideal characteristics of the converter. A summation block combines a compensation signal from the compensation circuit with a non-ideal output signal from the converter in order to provide a compensated output signal. This has substantially no effect on other modulator performance characteristics and contributes to the implementation of giga sample-per-second Continuous Time sigma deltas having the dynamic range capabilities of traditional DT sigma deltas.