Abstract: A balance circuit for an amplifier circuit having 2.sup.M amplifiers serially biased across a supply potential node and a common potential node, where M is an integer greater than 0, and having respective 2.sup.M -1 interstage bias nodes and voltages between the amplifiers which are driven by respective input drive signals provided by 2.sup.M -1 2-way power splitters. A voltage reference circuit provides as to each power splitter first and second reference potentials respectively associated therewith. A plurality of control circuits are associated with respective power splitters and interstage nodes. Each control circuit is responsive to the associated first and second reference potentials and the interstage bias node for controlling the signal levels of the first and second drive signals provided by the associated 2-way splitter as a function of the associated interstage bias potential relative to the first and second reference potentials.

Abstract: A DC to DC power supply including an RF driver circuit for providing an RF output drive signal having a frequency greater than about 50 MHz, power amplifier circuitry responsive to the RF output drive signal and a DC voltage supply for providing an amplified AC output, and an impedance transforming circuit such as a balun transformer for transforming the AC amplified output to an impedance transformed AC signal. The transformed AC signal is provided to a rectifying circuit which provides a DC output. A feedback regulation control circuit provides for regulation of the power supply output voltage. The DC to DC power supply is advantageously implemented with printed microstrip or stripline passive components.