Abstract: A drop-on-demand piezo-electric printhead has channel walls defined by piezo-electric material (10) with electrodes (26) along the length thereof. In portions of the channels which are open to an ink supply conduit, the piezo material is locally disabled, e.g. by reducing the width of the electrode or by interposing a material (40) of lower dielectric constant between the electrode and the piezo material. A lower capacitive load results.

Abstract: A ceramic piezoelectric ink jet print head having at least one channel with walls coated with a multi-layer coating including an electronic barrier layer and an electrically conducting layer where the electric barrier layer is disposed between the channel well and the electrically conducting layer.

Abstract: A process for the selective passivation of the channel walls of a channelled ink-jet printhead component by the chemical vapor deposition of a passivant coating, the process comprising mounting the component in a support in registration with a datum location therein, the support having masking means for masking selected areas of the component, and depositing the passivant coating on unmasked portions of the channel walls.

Abstract: A drop-on-demand piezo-electric printhead has channel walls defined by piezo-electric material (10) with electrodes (26) along the length thereof. In portions of the channels which are open to an ink supply conduit, the piezo material is locally disabled, e.g. by reducing the width of the electrode or by interposing a material (40) of lower dielectric constant between the electrode and the piezo material. A lower capacitive load results.

Abstract: A drop-on-demand piezo-electric printhead has channel walls defined by piezo-electric material (10) with electrodes (26) along the length thereof. In portions of the channels which are open to an ink supply conduit, the piezo material is locally disabled, e.g. by reducing the width of the electrode or by interposing a material (40) of lower dielectric constant between the electrode and the piezo material. A lower capacitive load results.

Abstract: A process for the selective passivation of the channel walls of a channelled ink-jet printhead component by the chemical vapor deposition of a passivant coating, the process comprising mounting the component in a support in registration with a datum location therein, the support having masking means for masking selected areas of the component, and depositing the passivant coating on unmasked portions of the channel walls.

Abstract: A process for the selective passivation of the channel walls of a channelled ink-jet printhead component by the chemical vapor deposition of a passivant coating, the process comprising mounting the component in a support in registration with a datum location therein, the support having masking means for masking selected areas of the component, and depositing the passivant coating on unmasked portions of the channel walls.

Abstract: This invention relates to improvements in or relating to ceramic piezoelectric ink jet print heads of the kind having an ink channel for connection to an ink ejection nozzle and to a reservoir for the ink, and a piezoelectric wall actuator which forms part of the channel and is displaceable in response to a voltage pulse thereby generating a pulse in liquid ink in the channel due to a change of pressure therein which causes ejection of a liquid droplet from the channel. Such print heads are referred to hereafter as piezoelectric ceramic ink jet print heads.

Abstract: A digital to analog converter (DAC) includes "shut-down" circuitry that opens connections between the DAC's reference and output sections. The shutdown circuitry provides reduced power consumption while permitting the DAC's control registers to retain their values. The invention is applicable to both stand-alone DAC and analog to digital converters (ADCs) which incorporate a DAC and can be microprocessor controlled.

Abstract: A CMOS input circuit that has a first inverter stage for comparing non rail-to-rail digital input voltages to a threshold voltage, and producing inverted CMOS output voltages is disclosed. The inverted output voltages are approximately equal to a low CMOS supply voltage plus an offset voltage and a high CMOS supply voltage. The inverter includes PMOS and NMOS transistors that are connected to receive a common input voltage at their gates and to have a common drain current. The PMOS' source is connected to the high supply voltage, and the NMOS' source is connected through a voltage drop circuit element to the low supply voltage. The inverted output voltage is produced at the connection of the PMOS and NMOS transistors' drains. The NMOS and PMOS transistors have gate width and length parameters W.sub.N, L.sub.N and W.sub.P, L.sub.P, respectively. The ratio ##EQU1## is selected so that the threshold voltage is set between the maximum low and minimum high input signals for a desired range of high supply voltages.

Abstract: In a thin film circuit, high values of resistance/surface area can be attained by forming the resistive material as a mesh rather than a solid block. The advantages of this are that it gives a high resistance value in a small area and allows laser trimming, both without adversely affecting resistor characteristics such as stability.

Abstract: Suction device for use with a tracheostomy tube to remove matter from the upper respiratory tract of a patient. The suction device is essentially tubular and open at both ends, and comprises a bulb near one end and a tubular portion which extends from the bulb to the other end. To use, one connects the end remote from the bulb to a source of vacuum and inserts the bulbous end of the suction device into the end of a tracheostomy tube which is outside the patient's body. The suction device can be used with tracheostomy tubes of different sizes, and is used in place of a catheter.