Abstract: Lateral FET structure is disclosed for bidirectional power switching, including AC application. Voltage blocking capability is substantially increased by a shielding electrode insulated between first and second gate electrodes in a notch between laterally spaced source regions and channel regions joined by a common drift region around the bottom of the notch. The shielding electrode prevents the electric field gradient toward the gate electrode on one side of the notch from inducing depletion in the drift region along the opposite side of the notch. This prevents unwanted inducement of conduction channels in the drift region during the OFF state of the FET. High density, high voltage, plural FET structure is disclosed.

Abstract: Lateral FET structure is disclosed with an insulative region such as porous silicon filled with oxide formed in the drift region to divert the drift region current path and increase the length thereof to afford higher OFF state blocking voltage without increasing lateral dimensions. Combinations involving bidirectional power switching structures are also disclosed, as well as a multicell matrix array.

Abstract: Lateral FET Structure is disclosed for bidirectional power switching, including AC application. A pair of notches, each with a gate electrode, extend downwardly from a top major surface to separate left and right source regions and left and right channel regions, and direct the drift region current path between the channels around the bottoms of the notches. In the OFF state, each gate electrode shields its respective notch edge drift region portion from the electric field gradient from the other gate electrode, to prevent depletion along the notches and unwanted inducement of conduction channels, thus affording higher OFF state voltage blocking capability. High density, high voltage plural FET structure is disclosed.

Abstract: A gating technique during the OFF state is disclosed for split gate bidirectional power FET structure 2, including AC application. First and second conduction channels 14 and 16 are gated OFF to stop conduction. One of the channels such as 14 is then gated back ON to short an otherwise forward biased junction 18 between a common drift region 4 and the respective channel-containing region 6, to prevent minority carrier injection and consequent bipolar action. OFF state voltage is blocked by the reverse biased junction 20 between the drift region 4 and the other channel-containing region 8. The OFF state voltage blocking capability is higher without the forward biased injection junction 18.

Abstract: Lateral FET structure is disclosed for bidirectional power switching, including AC application. Voltage blocking capability is enhanced by field shaping in the drift region. In the OFF state, depletion from a channel region junction and from a field shaping region junction spread toward each other through the drift region to straighten out field lines and prevent curvature crowding of field lines at edges of notch means extending into the drift region and separating a pair of source regions and a pair of channel regions.

Abstract: Lateral FET structure is disclosed for bidirectional power switching, including AC application. A notch extends downwardly from a top major surface to separate left and right source regions and left and right channel regions, and direct the drift region current path between the channels around the bottom of the notch. Gate electrode means in the notch proximate the channels controls bidirectional conduction.

Abstract: Lateral FET structure is disclosed for bidirectional power switching, including AC application. A plurality of integrated FETs each have left and right source regions and left and right channel regions with a common drift region therebetween, and conduct current in either direction according to the polarity of main terminals. Gating means includes gate electrode means disposed proximate and insulated from the channel regions and adapted for storing trapped charge tunneled through an insulated layer from a charging electrode.

Abstract: Bidirectional power FET structure is disclosed with high OFF state voltage blocking capability. A shielding electrode is insulated between first and second gate electrodes in a notch between laterally spaced source regions and channel regions joined by a common drift region around the bottom of the notch. The shielding electrode is ohmically connected to the substrate containing the common drift region to be at the same potential level thereof and within a single junction drop of a respective main electrode across the junction between the respective channel containing region and drift region. The steering diode function for referencing the shielding electrode is performed by junctions already present in the integrated structure, eliminating the need for discrete dedicated steering diodes. The shielding electrode prevents the electric field gradient toward the gate electrode on one side of the notch from inducing depletion in the drift region along the opposite side of the notch.

Abstract: A solar cell (2) is provided for generating alternating current to drive an external load (18) in response to light radiation. A central region (4) of given conductivity type is disposed between said first and second regions (6) and (8) of intrinsic or invertable semiconductor material applied with AC gate drive (12). The light-generated hole-electron pairs alternately diffuse in opposite directions across the alternately induced pn junctions between the central region (4) and the first and second converted conductivity type intrinsic or invertable regions (6) and (8) to set up alternating potential gradients in opposite directions.

Abstract: An engine having a combustion driven piston is provided with piezoelectric transducer means responsive to piston movement to generate a voltage.

Abstract: A pattern is defined in a semiconductor wafer by forming one or more notches from a top major surface downwardly beyond the lowermost junction between opposite conductivity type regions, and by anodizing the wafer to provide a columnated porous region below and substantially confined to the lateral dimension of each notch. Anodization current flows substantially vertically, without significant lateral spreading. The porous regions are oxidized to afford well-defined vertically bordered insulative regions separating the lowermost junctions on opposite sides thereof.

Abstract: A high-frequency, high-power FET constructed upon a planar substrate with a repeated pattern of gate, source, and drain connections wherein any two are interconnected with metallization layers adjacent to and separated from the semiconductor substrate. The third element is interconnected with an overlay metallization layer separated from the lower two metallization layers by an insulating dielectric. The overlay layer is preferably grounded for minimum feedback capacitance.

Abstract: A high-frequency, high-power FET constructed upon a planar substrate with a repeated pattern of gate, source, and drain connections wherein any two are connected with metallization layers adjacent to and separated from the semiconductor substrate. The third element is interconnected with an overlay metallization layer separated from the lower two metallization layers by an insulating dielectric. The overlay layer is preferably grounded for minimum feedback capacitance.

Abstract: An osmotically driven fluid dispenser that is capable of being miniaturized and used as an implant to administer fluid drug compositions to animals and humans. The dispenser comprises a flexible inner bag adapted to contain the drug composition, a fluid tight plug fitted into the bag opening, a port in the plug through which the composition may be charged to the bag, an intermediate layer of an osmotically effective solute composition partly covering the bag exterior such that a band of the bag exterior proximate to the plugged end is not covered by the layer, an outer shape-retaining semipermeable membrane covering the layer of solute and forming a fluid tight seal at said band, and a tube that fits snugly through the port in the plug and extends substantially into the interior of the bag after the drug composition is charged to the bag, said tube providing an outlet through which the drug composition may be dispensed.

Abstract: A microwave transistor package which will accommodate large transistor chips as well as provide sufficient space for the addition of tuning capacitors or other circuits. The lead length inside of the package is minimized. A ceramic mounting pad is brazed to an underlying copper base and a nickel aperture plate is mounted around the mounting pad. The amount of ceramic material used is much less than in prior art devices. Tuning capacitors or other devices are mounted upon the top surface nickel spacer and connected to the transistor chip. In the preferred embodiment, the entire package is hermetically sealed.