Patents by Inventor James A. Colby

James A. Colby has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9190833
    Abstract: A circuit protection device includes a fuse element placed in parallel with a PTC thermistor layer. The element and PTC thermistor layer are provided on one or more insulating substrate, such as an FR-4 or polyimide substrate. First and second conductors connect the fuse element and PTC thermistor layer electrically in parallel, such that current (i) initially under normal flows mainly through the fuse element and PTC thermistor layer at a lower drop in voltage and (ii) after an opening of the fuse element flows under normal operation through the PTC thermistor layer at a higher drop in voltage.
    Type: Grant
    Filed: January 15, 2013
    Date of Patent: November 17, 2015
    Assignee: LITTELFUSE, INC.
    Inventors: James A. Colby, Stephen Whitnery, Du Yaosheng
  • Publication number: 20090027821
    Abstract: A circuit protection device includes a fuse element placed in parallel with a PTC thermistor layer. The element and PTC thermistor layer are provided on one or more insulating substrate, such as an FR-4 or polyimide substrate. First and second conductors connect the fuse element and PTC thermistor layer electrically in parallel, such that current (i) initially under normal flows mainly through the fuse element and PTC thermistor layer at a lower drop in voltage and (ii) after an opening of the fuse element flows under normal operation through the PTC thermistor layer at a higher drop in voltage.
    Type: Application
    Filed: July 26, 2007
    Publication date: January 29, 2009
    Applicant: LITTELFUSE, INC.
    Inventors: James A. Colby, Stephen Whitney, Du Yaosheng
  • Patent number: 7183891
    Abstract: A voltage variable material (“VVM”) including an insulative binder that is formulated to intrinsically adhere to conductive and non-conductive surfaces is provided. The binder and thus the VVM is self-curable and applicable in a spreadable form that dries before use. The binder eliminates the need to place the VVM in a separate device or to provide separate printed circuit board pads on which to electrically connect the VVM. The binder and thus the VVM can be directly applied to many different types of substrates, such as a rigid FR-4 laminate, a polyimide, a polymer or a multilayer PCB via a process such as screen or stencil printing. In one embodiment, the VVM includes two types of conductive particles, one with a core and one without a core. The VVM can also have core-shell type semiconductive particles.
    Type: Grant
    Filed: October 5, 2004
    Date of Patent: February 27, 2007
    Assignee: Littelfuse, Inc.
    Inventors: Edwin James Harris, Tushar Vyas, Timothy Pachla, James A. Colby
  • Patent number: 7035072
    Abstract: The present invention provides an ESD apparatus that includes an electrical overstress suppression device in series with a capacitor. The ESD apparatus is ideally suited for use with network communication devices, but any electronic device requiring overvoltage protection and isolation may employ the ESD apparatus of the present invention. In one embodiment, the ESD apparatus includes a capacitor and an electrical overstress protection device that electrically communicates in series with the capacitor. In another embodiment, the ESD apparatus includes an electrical overstress protection device having a voltage variable material and a capacitor that electrically communicates in series with the overstress protection device. The capacitor is sized so that the overstress device can withstand an application of a predetermined steady state voltage.
    Type: Grant
    Filed: July 10, 2002
    Date of Patent: April 25, 2006
    Assignee: Littlefuse, Inc.
    Inventor: James A. Colby
  • Publication number: 20030011026
    Abstract: The present invention provides an ESD apparatus that includes an electrical overstress suppression device in series with a capacitor. The ESD apparatus is ideally suited for use with network communication devices, but any electronic device requiring overvoltage protection and isolation may employ the ESD apparatus of the present invention. In one embodiment, the ESD apparatus includes a capacitor and an electrical overstress protection device that electrically communicates in series with the capacitor. In another embodiment, the ESD apparatus includes an electrical overstress protection device having a voltage variable material and a capacitor that electrically communicates in series with the overstress protection device. The capacitor is sized so that the overstress device can withstand an application of a predetermined steady state voltage.
    Type: Application
    Filed: July 10, 2002
    Publication date: January 16, 2003
    Inventor: James A. Colby