Abstract: The present invention is directed to III-V semiconductor trench MOSFETs comprising a buried field shield. The invention is further directed to an etch and regrowth method for forming this buried field shield. For example, in III-V trench MOSFETs with an n-type substrate, the region can be formed by an etch into the drift (n-type) and regrowth of p-type semiconductor to form the buried field shield in the trench area and a body/channel outside the trench area. With a narrow trench feature size, the regrowth will planarize enabling subsequent source epitaxy (n-type) without requiring ex-situ processing between body/channel and source growths, eliminating the need for additional masking of the regrowth.

Abstract: Structures for an insulated-gate bipolar transistor and methods of forming a structure for an insulated-gate bipolar transistor. The structure comprises a semiconductor substrate having a front surface and a back surface opposite from the front surface. The semiconductor substrate comprises a wide bandgap semiconductor material. The structure further comprises a gate electrode at the front surface of the semiconductor substrate, and a diode at the back surface of the semiconductor substrate.

Abstract: An example device includes a circuit board: an electronic component that is attached to the circuit board and generates heat during operation; an enclosure, at least a portion of the enclosure being electrically conductive; a spacer positioned between the circuit board and the enclosure, the spacer comprising a first surface in contact with the circuit board and a second surface in contact with the electrically conductive portion of the enclosure, wherein the spacer is formed of a dielectric material and includes one or more electrically conductive pathways between the first surface and the second surface; and a fastener coupling the circuit board to the electrically conductive portion of the enclosure, the fastener passing through the spacer.

Abstract: Structures for a transistor and methods of forming a structure for a transistor. The structure comprises a semiconductor substrate including a top surface and a trench, a gate electrode disposed in the trench, a first doped region disposed beneath the trench, a first contact coupled to the first doped region, a second doped region disposed in a vertical direction between the first doped region and the top surface, and a plurality of second contacts coupled to the second doped region. The semiconductor substrate comprises a wide bandgap semiconductor material. The first contact extends in the semiconductor substrate from the top surface to a first depth that adjoins the first doped region. The plurality of second contacts extend in the semiconductor substrate from the top surface to a second depth that adjoins the second doped region, and the second depth is less than the first depth.

Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. The structure comprises a semiconductor substrate comprising a wide bandgap semiconductor material, a gate electrode, a first gate dielectric layer disposed on the semiconductor substrate, and a second gate dielectric layer disposed between the first gate dielectric layer and the gate electrode.

Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. The method comprises cleaning a surface of a semiconductor substrate with atomic layer etching. The semiconductor substrate comprises a wide bandgap semiconductor material. The method further comprises forming a gate dielectric layer on the surface of the semiconductor substrate.

Abstract: A semiconductor device includes a substrate, drift, source, gate and base regions, and a drain portion. The substrate is doped with a first dopant type. The drift region is disposed above the semiconductor substrate, and is doped with the first dopant type at a lower concentration. The source region is doped with the first dopant type. The gate region is disposed above the drift region and part of the source region. The base region is disposed between the source and drift regions. The base region includes a first trench extending in a first direction, and a second trench extending in a second direction and intersecting the first trench. The trenches extend into a top surface of the base region. Each trench has at least a vertical wall and at least a horizontal wall. The base region conduct current on the vertical and horizontal walls of the trenches.

Abstract: A semiconductor device includes at least a first lateral MOSFET formed on a semiconductor substrate. The first lateral MOSFET has an interface defined by a plurality of trenches along which the current flow can be modulated by a perpendicular electric field. The portion of the interface lies on a plane substantially perpendicular to the plane of the substrate. The interface is configured such that at least a portion of the current flow along the portion of the interface that lies on a plane substantially perpendicular to the plane of the substrate is in a direction substantially parallel to the plane of the substrate.

Abstract: Structures for a junction field-effect transistor and methods of forming such structures. The structure comprises a semiconductor substrate including a trench, and a source including a doped region in the semiconductor substrate adjacent to the trench. The doped region and the semiconductor substrate have the same conductivity type. The doped region has a first boundary adjacent to a surface of the semiconductor substrate and a second boundary spaced in depth from the first boundary. The structure further comprises a gate structure including a conductor layer inside the trench and a dielectric layer inside the trench. The first conductor layer has a surface positioned between the first boundary of the doped region and the second boundary of the doped region, and the dielectric layer is positioned on the surface of the conductor layer.

Abstract: A Schottky diode includes an upper region having a first doping concentration of a first conductivity type, the upper region disposed above the SiC substrate and extending up to a top planar surface. First and second layers of a second conductivity type are disposed in the upper region adjoining the top planar surface and extending downward to a depth. Each of the first and second layers has a second doping concentration, the depth, first doping concentration, and second doping concentration being selected such that the first and second layers are depleted of carriers at a zero bias condition of the Schottky diode. A top metal layer disposed along the top planar surface in direct contact with the upper region and the first and second layers is the anode, and bottom metal layer disposed beneath the SiC substrate is the cathode, of the Schottky diode.

Abstract: A Schottky diode includes an upper region having a first doping concentration of a first conductivity type, the upper region disposed above the SiC substrate and extending up to a top planar surface. First and second layers of a second conductivity type are disposed in the upper region adjoining the top planar surface and extending downward to a depth. Each of the first and second layers has a second doping concentration, the depth, first doping concentration, and second doping concentration being selected such that the first and second layers are depleted of carriers at a zero bias condition of the Schottky diode. A top metal layer disposed along the top planar surface in direct contact with the upper region and the first and second layers is the anode, and bottom metal layer disposed beneath the SiC substrate is the cathode, of the Schottky diode.

Abstract: A Schottky diode includes an upper region having a first doping concentration of a first conductivity type, the upper region disposed above the SiC substrate and extending up to a top planar surface. First and second layers of a second conductivity type are disposed in the upper region adjoining the top planar surface and extending downward to a depth. Each of the first and second layers has a second doping concentration, the depth, first doping concentration, and second doping concentration being selected such that the first and second layers are depleted of carriers at a zero bias condition of the Schottky diode. A top metal layer disposed along the top planar surface in direct contact with the upper region and the first and second layers is the anode, and bottom metal layer disposed beneath the SiC substrate is the cathode, of the Schottky diode.

Abstract: A semiconductor device includes at least a first lateral MOSFET formed on a semiconductor substrate. The first lateral MOSFET has an interface defined by a plurality of trenches along which the current flow can be modulated by a perpendicular electric field. The portion of the interface lies on a plane substantially perpendicular to the plane of the substrate. The interface is configured such that at least a portion of the current flow along the portion of the interface that lies on a plane substantially perpendicular to the plane of the substrate is in a direction substantially parallel to the plane of the substrate.

Abstract: A Schottky diode includes an upper region having a first doping concentration of a first conductivity type, the upper region disposed above the SiC substrate and extending up to a top planar surface. First and second layers of a second conductivity type are disposed in the upper region adjoining the top planar surface and extending downward to a depth. Each of the first and second layers has a second doping concentration, the depth, first doping concentration, and second doping concentration being selected such that the first and second layers are depleted of carriers at a zero bias condition of the Schottky diode. A top metal layer disposed along the top planar surface in direct contact with the upper region and the first and second layers is the anode, and bottom metal layer disposed beneath the SiC substrate is the cathode, of the Schottky diode.

Abstract: A Schottky diode includes an upper region having a first doping concentration of a first conductivity type, the upper region disposed above the SiC substrate and extending up to a top planar surface. First and second layers of a second conductivity type are disposed in the upper region adjoining the top planar surface and extending downward to a depth. Each of the first and second layers has a second doping concentration, the depth, first doping concentration, and second doping concentration being selected such that the first and second layers are depleted of carriers at a zero bias condition of the Schottky diode. A top metal layer disposed along the top planar surface in direct contact with the upper region and the first and second layers is the anode, and bottom metal layer disposed beneath the SiC substrate is the cathode, of the Schottky diode.

Abstract: A semiconductor device fabrication method includes forming first and second spaced apart base regions and source regions in a substrate with a portion of a drift region therebetween. The method further includes forming at least a first trench extending laterally through the base region, the drift region and the source region, the first trench extending vertically partially through the source region. The method also includes forming a first oxide layer over the trenched upper surface, and forming a polysilicon layer over the first oxide layer. The polysilicon layer is patterned to form the gate conductor, and a drain contact is formed on a bottom surface of the semiconductor substrate.

Abstract: A semiconductor device fabrication method includes forming first and second spaced apart base regions and source regions in a substrate with a portion of a drift region therebetween. The method further includes forming at least a first trench extending laterally through the base region, the drift region and the source region, the first trench extending vertically partially through the source region. The method also includes forming a first oxide layer over the trenched upper surface, and forming a polysilicon layer over the first oxide layer. The polysilicon layer is patterned to form the gate conductor, and a drain contact is formed on a bottom surface of the semiconductor substrate.

Abstract: A semiconductor device fabrication method includes forming first and second spaced apart base regions and source regions in a substrate with a portion of a drift region therebetween. The method further includes forming at least a first trench extending laterally through the base region, the drift region and the source region, the first trench extending vertically partially through the source region. The method also includes forming a first oxide layer over the trenched upper surface, and forming a polysilicon layer over the first oxide layer. The polysilicon layer is patterned to form the gate conductor, and a drain contact is formed on a bottom surface of the semiconductor substrate.

Abstract: We disclose a kit and associated method for mounting a flat panel light fixture to a surface. The kit includes: a flat panel light fixture having opposing front panel and rear panels, a light-emitting element, fixture wires for electrically connecting the light-emitting element to household wires, and fixture-mounting openings extending through the fixture; a quick-connect unit for mounting to a junction box installed within the surface and for electrically connecting the fixture wires to the household wires; a tether for suspending the fixture from the junction box; and a plurality of attachment members configured to extend through the openings within the fixture and into the surface to secure the fixture to the surface in a first position wherein the fixture is spaced from the surface and a second position wherein the fixture is mounted in contact with the surface.

Abstract: An engine oil cooler backflush valve assembly is provided as a replacement cap to an engine oil cooler EGR coolant supply cover. The backflush valve assembly includes a main body through which a valve stem is inserted. The valve stem has a bushing threadedly attached thereto which moves the valve stem between first and second positions. A removable cap is provided to cover the backflush valve assembly during normal operation and to be removed during backflush operation. A removable lock can also be used to secure the cap and/or bushing to the main body of the assembly.