Patents by Inventor James A. Duda

James A. Duda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8621194
    Abstract: A system for booting a processor from NAND flash, comprising a NAND agnostic boot controller and a NAND flash device, wherein the NAND flash device further comprises a boot wrapper storing boot code in a predetermined format.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: December 31, 2013
    Assignee: Conexant Systems, Inc.
    Inventors: James A. Duda, Andre M. Hassan, Nathan J. Dohm, Robert Swope Fleming, Michael Joseph Schaffstein
  • Publication number: 20120054476
    Abstract: A system for booting a processor from NAND flash, comprising a NAND agnostic boot controller and a NAND flash device, wherein the NAND flash device further comprises a boot wrapper storing boot code in a predetermined format.
    Type: Application
    Filed: August 31, 2010
    Publication date: March 1, 2012
    Inventors: James A. Duda, Andre M. Hassan, Nathan J. Dohm, Robert Swope Fleming, Michael Joseph Schaffstein
  • Patent number: 6907508
    Abstract: In a digital data processing system having a memory component, a structure and method for managing available memory resources. Free pointers to respective free memory blocks are stored in memory blocks maintained as a linked list. In a system having a hierarchically-organized memory component, a small number of the free pointers are maintained at a relatively higher performance level of the memory and the balance of the free pointers are maintained at a relatively lower performance level of the memory.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: June 14, 2005
    Assignee: Emulex Design & Manufacturing Corporation
    Inventors: Glenn Dearth, Carl J. Lindeborg, Robin L. Brown, James A. Duda, Sudhir Srinivasan
  • Patent number: 6785189
    Abstract: In a memory controller for use with a DDR SDRAM, an apparatus improves the immunity of the controller to noise glitches on the DQS signal provided by the DDR SDRAM during READ operations. A method adjusts the noise immunity provided by the apparatus. In particular DQS quality circuits frame the DQS signal for a predetermined portion of the READ operation.
    Type: Grant
    Filed: September 16, 2002
    Date of Patent: August 31, 2004
    Assignee: Emulex Design & Manufacturing Corporation
    Inventors: George M. Jacobs, James A. Duda
  • Publication number: 20040168037
    Abstract: In a digital data processing system having a memory component, a structure and method for managing available memory resources. Free pointers to respective free memory blocks are stored in memory blocks maintained as a linked list. In a system having a hierarchically-organized memory component, a small number of the free pointers are maintained at a relatively higher performance level of the memory and the balance of the free pointers are maintained at a relatively lower performance level of the memory.
    Type: Application
    Filed: February 26, 2003
    Publication date: August 26, 2004
    Inventors: Glenn Dearth, Carl J. Lindeborg, Robin L. Brown, James A. Duda, Sudhir Srinivasan
  • Publication number: 20040052151
    Abstract: In a memory controller for use with a DDR SDRAM, apparatus for improving the immunity of the controller to noise glitches on the DQS signal provided by the DDR SDRAM during READ operations. A method is also disclosed for adjusting the noise immunity provided by the disclosed apparatus.
    Type: Application
    Filed: September 16, 2002
    Publication date: March 18, 2004
    Inventors: George M. Jacobs, James A. Duda