Abstract: A digital receiver contains a local video clock that controls the video presentation speed and a local audio clock that controls the audio presentation speed separately and independently of the video presentation speed. To control the video presentation speed, a comparator compares a program clock reference in a video packet with a local time. A video clock controller then speeds up or slows down the video clock as needed to be back on schedule. To control the audio presentation speed, a comparator compares a program clock reference in an audio packet with the local time. An audio clock controller then speeds up or slows down the audio clock as needed to be back on schedule.

Abstract: A digital receiver contains a local video clock that controls the video presentation speed and a local audio clock that controls the audio presentation speed separately and independently of the video presentation speed. To control the video presentation speed, a comparator compares a program clock reference in a video packet with a local time. A video clock controller then speeds up or slows down the video clock as needed to be back on schedule. To control the audio presentation speed, a comparator compares a program clock reference in an audio packet with the local time. An audio clock controller then speeds up or slows down the audio clock as needed to be back on schedule.

Abstract: A digital receiver contains a local video clock that controls the video presentation speed and a local audio clock that controls the audio presentation speed separately and independently of the video presentation speed. To control the video presentation speed, a comparator compares a program clock reference in a video packet with a local time. A video clock controller then speeds up or slows down the video clock as needed to be back on schedule. To control the audio presentation speed, a comparator compares a program clock reference in an audio packet with the local time. An audio clock controller then speeds up or slows down the audio clock as needed to be back on schedule.

Abstract: Video graphics methods and systems can reduce objectionable ringing associated with composited user interface elements and video content, while at the same time preserve, to a desirable degree, the fidelity of the video content. In at least some embodiments, after the user interface elements are created, they are pre-filtered, before compositing, in a particular way that is designed to reduce undesirable ringing. Further, in at least some embodiments, during the compositing process, the left and right edges of the user interface elements are treated in a manner that is designed to reduce the ringing that would otherwise be induced by the left and right edges respectively.

Abstract: A method and apparatus for managing error/status information generated in the demultiplexing, processing, and handling of data packets from a video transport stream. Error/status information is organized into control fields of error/status packets. The error/status packets are sent to dedicated error/status buffers of bulk system memory where they can be accessed by a system processor during the reconfiguration and decoding of video programming.

Abstract: A processing apparatus for processing multiple video programs from one or more transport streams. The processing apparatus has a transport processing circuit that includes multiple transport processor units. The transport processor units utilize a common transport processor memory unit having demux context entries containing processing and hardware state information for packet types. Each transport processor unit includes a transport interface for identifying data packets to be acquired from the transport stream, a demultiplexing processor for processing the acquired data packets, and a demultiplexing DMA unit for memory handling operations of the processed data packets. Index chaining allows the transport processor units to access information from the transport processor memory unit. The method uses indices to access demux context entries from the transport processor memory unit. Related DMA indices are used to access memory handling information from the transport processor memory unit.

Abstract: A method and apparatus for managing error/status information generated in the demultiplexing, processing, and handling of data packets from a video transport stream. Error/status information is organized into control fields of error/status packets. The error/status packets are sent to dedicated error/status buffers of bulk system memory where they can be accessed by a system processor during the reconfiguration and decoding of video programming.

Abstract: A digital receiver contains a local video clock that controls the video presentation speed and a local audio clock that controls the audio presentation speed separately and independently of the video presentation speed. To control the video presentation speed, a comparator compares a program clock reference in a video packet with a local time. A video clock controller then speeds up or slows down the video clock as needed to be back on schedule. To control the audio presentation speed, a comparator compares a program clock reference in an audio packet with the local time. An audio clock controller then speeds up or slows down the audio clock as needed to be back on schedule.

Abstract: A processing apparatus for processing multiple video programs from one or more transport streams. The processing apparatus has a transport processing circuit that includes multiple transport processor units. The transport processor units utilize a common transport processor memory unit having demux context entries containing processing and hardware state information for packet types. Each transport processor unit includes a transport interface for identifying data packets to be acquired from the transport stream, a demultiplexing processor for processing the acquired data packets, and a demultiplexing DMA unit for memory handling operations ofthe processed data packets. Index chaining allows the transport processor units to access information from the transport processor memory unit. The method uses indices to access demux context entries from the transport processor memory unit. Related DMA indices are used to access memory handling information from the transport processor memory unit.

Abstract: A method and apparatus for managing error/status information generated in the demultiplexing, processing, and handling of data packets from a video transport stream. Error/status information is organized into control fields of error/status packets. The error/status packets are sent to dedicated error/status buffers of bulk system memory where they can be accessed by a system processor during the reconfiguration and decoding of video programming.

Abstract: An apparatus and method for taking data that is presented on a NUBUS in NUBUS format and writing it into a video memory in chunky planar format, is described. The present invention is also useful for performing RGB reads wherein video data is read from the video memory in chunky planar format and is translated into NUBUS format for transmission across the NUBUS. The apparatus comprises a data format translator which is coupled to the NUBUS for translating the RGB data from NUBUS format to chunky planar format. The translated RGB data in chunky planar format is compressed and rearranged as compared to the NUBUS format--resulting in a more efficient utilization of video memory space. An address generator is also coupled to the video memory for calculating the address location in the video memory where the translated RGB data is to be written. The address location is derived from the NUBUS address according to the formula N.sub.start =(3*NAD/4) where N.sub.

Abstract: An apparatus and method is disclosed for reducing flicker in an interlaced computer generated raster-scanned display. Several circuits and methods are described for implementing vertical filtering. In general, the data for a given pixel on the nth, nth+1, nth+2 . . . nth+N line is read from memory and convolved to provide data for a given pixel on a display line before pixel data for other pixels along these lines is read from memory.