Abstract: The presence of a child restraint seat on a vehicle seat is detected by a child restraint seat anchor that is movable from a first position to a second position when a strap from the child restraint seat is coupled to the anchor. In accordance with the preferred embodiment, the movable anchor is slidably mounted in a housing and slides against the bias of at least one spring when the child restraint seat is coupled thereto. A micro switch is activated upon the moveable anchor sliding from the first position to the second position to cause an air bag controller to either deactivate or slow deployment of an air bag when the child seat is present.

Abstract: A low-voltage CMOS switching controller which utilizes PMOS and nMOS devices to control the switching of a high voltage power supply. Two pMOS devices are used as switches to control the high voltage level on an output terminal and an nMOS device is used to switch the output terminal to ground once the high voltage has been reduced to a safe level. The controller also includes circuitry which prevents both pMOS devices from being on at the same time, thereby shunting the high voltage supply to ground.

Abstract: An A/D system having a capacitive DAC is provided with a circuit for accurately testing the functionality of the A/D system. An accurate reference voltage which is associated with A/D systems is utilized directly by selectively coupling the accurate reference voltage to predetermined ones of a plurality of rank ordered capacitors forming a binarily weighted DAC via a plurality of switches. After charging the predetermined capacitors, an effective test voltage results which is then coupled by the switches to successive approximation circuitry associated with the A/D system. A resulting digital output code may be compared with the weighted analog value of the switched reference voltage to test whether the circuitry of the A/D system is functioning properly.

Abstract: A capacitive digital to analog converter which can be trimmed to obtain precise capacitor matching is provided. The trimming method may be utilized with a weighted capacitive D/A converter having a scaling capacitor and an ordered plurality of capacitors for developing an analog output signal as a function of a digital input code. A compensation portion is coupled to at least a predetermined one of the capacitors for selectively changing the effective capacitive value of the predetermined capacitor.

Abstract: A fully differential operational amplifier is provided having a common-mode feedback portion which accurately sets the common-mode output voltage at a predetermined value. The feedback portion utilizes a pair of parallel transistors which source a combined current which is used to provide a common-mode control voltage relative to a reference common-mode current. The common-mode control voltage controls load devices of the operational amplifier in a manner such that a differential output voltage remains centered about the predetermined common-mode output voltage.

Abstract: An analog switch structure which utilizes three switches and has low leakage current is provided. A first switch couples an input terminal to a node in response to a control signal. A second switch connects the node to an output terminal in response to the control signal. A buffer circuit is connected to the output terminal for providing a buffered output signal. A third switch is connected between the buffered output signal and the node to selectively connect the buffered output signal to the node, thereby maintaining zero voltage potential across the second switch.

Abstract: A voltage reference circuit is disclosed having a common gate differential stage which utilizes the base-to-emitter voltage V.sub.BE, of a bipolar transistor to provide a reference current through a first resistor. Current mirror means are coupled to the differential stage to couple the reference current to second and third resistors which develop the output reference voltage. By ratioing the second and third resistors to the first resistor, a stable output reference voltage which is proportional to the V.sub.BE of the bipolar transistor is provided.

Abstract: A hysteresis circuit is added to a differential comparator to provide a predetermined bias current from one of two input transistors connected in a differential configuration. A current mirror structure is used to accurately determine the amount of current which is shunted when the output of the comparator is in a predetermined state.