Patents by Inventor James A. Nolan

James A. Nolan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6449738
    Abstract: A bus-clock-speed-independent apparatus and method of wrap input/output (I/O) testing of an I/O interface is provided. Launch data is launched in response to a launch clock. A capture clock is derived from the launch clock by delaying the launch clock through a programmable delay. Launch data is wrapped through the I/O interface buffers and captured in response to the capture clock. A initial value of the programmable delay is selected and successively increased or decreased until the launch data is just captured, or just fails to be captured, respectively. The value of the programmable delay when this occurs provides a measure of the limiting speed of the I/O interface.
    Type: Grant
    Filed: December 3, 1998
    Date of Patent: September 10, 2002
    Assignees: International Business Machines Corporation, Motorola, Inc
    Inventors: Fahd Hinedi, James Nolan Hardage, Jr., Lakshmikant Mamileti
  • Publication number: 20020085958
    Abstract: The present invention relates to a container having internal projections capable of exerting compressive, frictional, or other forces on a sample-collecting device and sample before detecting an analyte in the sample. The invention can be used whenever detecting an analyte in a sample is improved or made possible by first changing the physical or chemical properties of the sample or analyte in a pretreatment step.
    Type: Application
    Filed: July 11, 2001
    Publication date: July 4, 2002
    Inventors: Thomas A. Nemcek, John Brian Barclay, Jovo Dragicevic, Paul Leonard Eck, David Henry Gement, Seymour Greenfield, Michelle Petra Haddon, Michael James Nolan, Steven Louis Strang, Stephen Melamed, Vincent Shine, Peter Langmar, Laura A. Ferrario, Luc Heiligenstein
  • Patent number: 6415362
    Abstract: A method and system for performing write-through store operations of valid data of varying sizes in a data processing system, where the data processing system includes multiple processors that are coupled to an interconnect through a memory hierarchy, where the memory hierarchy includes multiple levels of cache, where at least one lower level of cache of the multiple of levels of cache requires store operations of all valid data of at least a predetermined size. First, it is determined whether or not a write-through store operation is a cache hit in a higher level of cache of the multiple levels of cache. In response to a determination that cache hit has occurred in the higher level of cache, the write-through store operation is merged with data read from the higher level of cache to provide a merged write-through operation of all valid data of at least the predetermined size to a lower level of cache.
    Type: Grant
    Filed: April 29, 1999
    Date of Patent: July 2, 2002
    Assignees: International Business Machines Corporation, Motorola, Inc.
    Inventors: James Nolan Hardage, Alexander Edward Okpisz, Thomas Albert Petersen
  • Patent number: 6408361
    Abstract: The present invention provides a method and apparatus for allowing autonomous, way specific tag updates. More specifically, the invention provides way specific tag and status updates while concurrently allowing reads of the ways not currently being updated. If a read hit is determined, then the read is processed in a typical fashion. However, if the read is a read miss and one of the ways is flagged as being updated, then all ways are read again once the specific way has completed its updated.
    Type: Grant
    Filed: September 2, 1999
    Date of Patent: June 18, 2002
    Assignees: International Business Machines Corporation, Motorola, Inc.
    Inventors: Thomas Albert Petersen, James Nolan Hardage, Jr., Scott Ives Remington
  • Publication number: 20020012630
    Abstract: The present invention provides methods for testing compounds to determine whether such compounds are useful for improving treatment of wounds in animals, particularly diabetic animals, and improving diabetic neuropathy or neurological disorders associated with diabetes. The invention also provides methods for characterizing compounds, particularly aldose reductase inhibitors, that are useful in improving wound healing in diabetic animals or improving diabetic neuropathy or neurological disorders associated with diabetes. In addition, the invention relates to methods for improving wound healing and improves diabetic neuropathy or neurological disorders associated with diabetes in diabetic animals using aldose reductase inhibitors.
    Type: Application
    Filed: May 9, 2001
    Publication date: January 31, 2002
    Inventors: James Nolan, Cheryl Armstrong, John C. Ansel
  • Patent number: 6328321
    Abstract: An adjustable mount for the upper end of a vehicle suspension strut allowing the strut to be relocated relative to a vehicle chassis member. The mount comprises a bush adapted to receive and secure the upper end of the strut, a flange extending radially outwardly from the bush, and a clamping plate adapted to abut the lower face of the flange. The flange has upper and lower faces, and the clamping plate has an opening therethrough larger than the perimeter of the bush such that the clamping plate can relatively slide over the lower face of the flange over a limited area. A plurality of studs extend upwardly from the clamping plate. The studs are located outside the periphery of the flange and restrict the sliding movement of the flange relative to the clamping plate by engagement with the periphery of the flange.
    Type: Grant
    Filed: May 24, 1999
    Date of Patent: December 11, 2001
    Assignee: Noltec Distribution
    Inventor: Gregory James Nolan
  • Patent number: 6269360
    Abstract: Where a plurality of ordered transactions are received for data transfers on a pipelined bus, each transaction in the series is initiated before all prospective retry responses to the preceding ordered transactions may be asserted. The address responses to all preceding ordered transfers are then monitored in connection with performance of the newly initiated transfer. If a retry response to any preceding ordered transaction is asserted, a self-initiated retry response for all subsequent transactions, including the newly initiated transfer, is also asserted. The system-retried transactions and all succeeding, ordered transactions are immediately reattempted. The overlapping performance of the ordered transfers reduces the latency of non-retried transfers, achieving performance comparable to non-ordered transactions.
    Type: Grant
    Filed: April 24, 1998
    Date of Patent: July 31, 2001
    Assignee: International Business Machines Corporation
    Inventors: Thomas Albert Petersen, James Nolan Hardage, Jr.
  • Patent number: 6256713
    Abstract: The present invention provides a method and apparatus for optimizing bus utilization while maintaining read and write coherence. More specifically the invention provides bus utilization optimization by prioritizing read transactions before write transactions, where there is no collision pending. When a collision pending is determined, then the read and write transactions are processed according to the age of the transaction(s) allowing for data coherency.
    Type: Grant
    Filed: April 29, 1999
    Date of Patent: July 3, 2001
    Assignee: International Business Machines Corporation
    Inventors: Srinath Audityan, James Nolan Hardage, Jr., Thomas Albert Petersen
  • Patent number: 6119204
    Abstract: A data processing system includes at least a first processor and a second processor that each have a respective translation lookaside buffer (TLB). In response to detection by the second processor of a TLB entry invalidation request, the second processor marks at least one memory referent instruction that is being processed by the second processor and invalidates a TLB entry in the TLB of the second processor. In response to receipt of a synchronization request at the second processor, the second processor indicates to the first processor that the second processor has invalidated the TLB entry if the second processor has completed processing the marked instruction. During the interval between receipt of the synchronization request and indicating to the first processor that the second processor has invalidated the TLB entry, the second processor continues to process instructions, including fetching instructions for processing.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: September 12, 2000
    Assignees: International Business Machines Corporation, Motorola, Inc.
    Inventors: Joseph Yih Chang, James Nolan Hardage, Jr., Jose Melanio Nunez, Thomas Albert Petersen
  • Patent number: 6072404
    Abstract: A universal garage door opener (UGDO) that records and recreates a carrier frequency signal from a wide range of commercially available garage door openers. A receiver portion of the UGDO includes a detector for removing a carrier wave of the received carrier frequency signal. The carrier frequency signal is applied to a frequency synthesizer including a dual modulus prescaler divider chain. The carrier frequency signal is divided down by the divider chain and compared to a divided reference frequency signal to determine the carrier frequency. The dual modulus divider chain starts at a maximum divide ratio, and periodically changes the divide ratio until the divided carrier frequency signal is within a predetermined resolution range of the divided reference frequency signal. A JK flip flop is used to hold a phase detect output signal of the frequency synthesizer indicative of the divided carrier frequency signal.
    Type: Grant
    Filed: April 29, 1997
    Date of Patent: June 6, 2000
    Assignee: Eaton Corporation
    Inventors: James Nolan, Eric Shreve
  • Patent number: 6047380
    Abstract: A semiconductor device for receiving analog input signals includes a microprocessor for processing signal information. The microprocessor is put in a sleep mode when not called upon to process signal information, and is either left in that mode or awakened depending on the level of a continuously variable analog input signal relative to a programmed threshold level. If the relative levels of the analog input signal and the programmed threshold level result in the microprocessor being awakened, information contained in the analog input signal is processed to initiate a selected action. In typical applications, the semiconductor device performs a control function, such as to control the operation of an external circuit in response to information from at least one continuously variable analog input signal derived from the external circuit. The microprocessor, when awakened, assists in controlling the external circuit to restore that analog input signal to a predetermined level distinct from the threshold level.
    Type: Grant
    Filed: December 8, 1997
    Date of Patent: April 4, 2000
    Assignee: Microchip Technology Incorporated
    Inventors: James Nolan, Brian Dellacroce
  • Patent number: 6023737
    Abstract: To implement full gathering of data transfers from a processor to a system bus without adding many levels of logic to the write enable logic for transaction queue entries or reducing the processor operating frequency, gatherable combinations are divided and gathering is performed in multiple stages operating in parallel. During the first stage, a subset of the full gathering is performed between incoming transactions and the last transaction received, coalescing the two transfers into a single transaction entry if one of the possible combinations within the subset is satisfied. During the second stage, existing queue entries are tested for the remainder of the full gather combination set and merged if a combination within the remaining subset is satisfied.
    Type: Grant
    Filed: April 24, 1998
    Date of Patent: February 8, 2000
    Assignees: International Business Machines Corporation, Motorola, Inc.
    Inventors: Thomas Albert Petersen, James Nolan Hardage, Jr.
  • Patent number: 6004274
    Abstract: Continuous, non-invasive method and apparatus for measuring blood pressure parameters and the like are disclosed. One disclosed apparatus includes an earpiece for sealing an individual's ear canal so that arterial blood pressure changes adjacent the sealed ear canal produce air pressure changes in the sealed ear canal. The apparatus further includes pressure sensing means for measuring the air pressure changes in the sealed ear canal and producing a signal related to the measured air pressure changes. In addition, the apparatus preferably includes processing means for processing the signal to measure blood pressure parameters, as well as means for displaying and/or recording the processed signal. The method may be used to determine heart rate, blood pressure, cardiac output, stroke volume, cardiac function, circulatory function, and other parameters. To obtain absolute pressure readings, two sensors, one in each ear, may be used to monitor pulse time transit delay.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: December 21, 1999
    Inventors: James A. Nolan, Trevor J. Moody
  • Patent number: 5404877
    Abstract: A leadless implantable cardiac arrhythmia alarm is disclosed which continuously assesses a patient's heart function to discriminate between normal and abnormal heart functioning and, upon detecting an abnormal condition, generates a patient-warning signal. The alarm is capable of sensing impedance measurements of heart, respiratory and patient motion and, from these measurements, generating an alarm signal when the measurements indicate the occurrence of a cardiac arrhythmia. Because it requires no external leads or feedthrough connectors, the hermetically-sealed patient alarm is minimally invasive and results in reduced trauma to a patient.
    Type: Grant
    Filed: June 4, 1993
    Date of Patent: April 11, 1995
    Assignee: Telectronics Pacing Systems, Inc.
    Inventors: James A. Nolan, Bruce M. Steinhaus, Tibor A. Nappholz
  • Patent number: 5361776
    Abstract: A time domain reflectometry (TDR) impedance sensor is provided for measuring body impedance along a lead or catheter implanted in a patient's cardiovascular system. The TDR sensor applies an electrical stimulus to the lead and measures reflections echoed from impedance variations along and distal to the lead, which are superimposed on the applied stimulus. The measured signals may be analyzed with respect to time-of-flight and distance along the lead to detect a plurality of physiologically meaningful signals.
    Type: Grant
    Filed: August 6, 1993
    Date of Patent: November 8, 1994
    Assignee: Telectronics Pacing Systems, Inc.
    Inventors: Kent E. Samuelson, Robert A. Morris, James A. Nolan, Bruce M. Steinhaus
  • Patent number: 5201808
    Abstract: A rate-responsive pacemaker employing a rate control parameter of respiratory minute volume, derived over a unipolar lead. The pacemaker performs the minute volume measurement by periodically applying a measuring current between the lead and a reference point on the pacemaker case. This measuring current has frequency components in a range from approximately 10 kilohertz to 1000 megahertz. Application of this measuring current allows the pacemaker to detect the voltage which arises from the applied current and, from the detected voltage, to measure the patient's spatial impedance. Spatial impedance and minute volume vary as a function of the patient's pleural pressure. The pacemaker derives minute volume and rate-responsive pacing rate from the spatial impedance measurement.
    Type: Grant
    Filed: February 10, 1992
    Date of Patent: April 13, 1993
    Assignee: Telectronics Pacing Systems, Inc.
    Inventors: Bruce M. Steinhaus, Tibor A. Nappholz, James A. Nolan, Robert A. Morris
  • Patent number: 5197467
    Abstract: A metabolic demand rate-responsive cardiac stimulation apparatus and method are disclosed which employ multiple physiological rate control parameters, such as respiratory minute volume, patient motion and cardiac stroke volume. The parameters are derived using a single standard pacing lead or transducer. The apparatus and method perform each physiological measurement by periodically applying a measuring current between two points within the apparatus. This measuring current has frequency components in a range of from approximately 10 kilohertz to 1000 megahertz. Application of this measuring current allows the apparatus to detect the voltage which arises from the applied current and, from the detected voltage, to measure the patient's spatial impedance. For a particular measurement, the apparatus controls which physiological parameter is sensed by regulating the frequency content of the measuring current.
    Type: Grant
    Filed: June 22, 1992
    Date of Patent: March 30, 1993
    Assignee: Telectronics Pacing Systems, Inc.
    Inventors: Bruce M. Steinhaus, Tibor A. Nappholz, James A. Nolan, Robert A. Morris, Ken Koestner
  • Patent number: 4907449
    Abstract: A radiosonde has a novel and improved measuring circuitry for measuring atmospheric conditions, such as, temperature, humidity and pressure through the direct conversion of resistance and capacitance values into binary numbers. The binary numbers are transmitted in digital form along with calibration coefficients to a remote ground station. The measuring circuitry can be mounted on the same substrate with the pressure transducer, and the electrical connections between the pressure transducer and measuring circuitry are simplified by utilization of an offset diaphragm, pressure cell arrangement.
    Type: Grant
    Filed: October 31, 1986
    Date of Patent: March 13, 1990
    Assignee: A.I.R., Inc.
    Inventors: David B. Call, James A. Nolan, Steven J. Lassman
  • Patent number: 3976861
    Abstract: An apparatus for maintaining a constant surface speed of a rotating work piece being cut by a moving cutting tool, comprising means for storing a first signal representing a binary coded decimal number which is further representative of the product of the desired constant surface speed of the work piece and a conversion constant. The apparatus is further comprised of a shift register for receiving a second signal representing a binary coded decimal number which is further representative of the current radial dimension of the work piece being cut, and means for storing a third signal representing a binary coded decimal number initially representative of an assumed rotational speed of the work piece.
    Type: Grant
    Filed: June 27, 1975
    Date of Patent: August 24, 1976
    Assignee: General Electric Company
    Inventors: Clarence Roy Edwards, John James Nolan
  • Patent number: D457823
    Type: Grant
    Filed: August 22, 2001
    Date of Patent: May 28, 2002
    Assignee: Visteon Global Technologies, Inc.
    Inventors: James Nolan, Paul D. Ashcraft