Abstract: Systems, methods and media for providing to a plurality of WPARs private access to physical storage connected to a server through a VIOS are disclosed. In one embodiment, a server is logically partitioned to form a working partition comprising a WPAR manager and individual WPARs. Each WPAR is assigned to a different virtual port. The virtual ports are created by using NPIV protocol between the WPAR and VIOS. Thereby, each WPAR has private access to the physical storage connected to the VIOS.

Abstract: A method for interfacing block storage devices is disclosed. The method can include receiving communications from an initiator at a block storage device interface, translating the received communications, transmitting the translated communications to a native storage device driver, forwarding the translated communication to a physical adapter, and controlling physical storage devices in response to the communications received from the initiator.

Abstract: A method for controlling input and output of a virtualized computing platform is disclosed. The method can include creating a device interface definition, assigning an identifier to a paging device and configuring commands useable by a virtual input output server. The commands can be sent to the input output server and can be converted by the input output server into paging device commands. A hypervisor can assist in facilitating the communication configuration. Other embodiments are also disclosed.

Abstract: A system and method which provide a mechanism for an I/O virtualization management partition (IMP) to control the shared functionality of an I/O virtualization (IOV) enabled I/O adapter (IOA) through a physical function (PF) of the IOA while the virtual functions (VFs) are assigned to client partitions for normal I/O operations directly. A hypervisor provides device-independent facilities to the code running in the IMP and client partitions. The IMP may include device specific code without the hypervisor needing to sacrifice its size, robustness, and upgradeability. The hypervisor provides the virtual intermediary functionally for the sharing and control of the IOA's control functions.

Abstract: A computer implemented method, apparatus, and computer usable program code for providing access to block storage. A source virtual input/output server is retrieved, parameters are used by the source virtual input/output server to provide a client access to the block storage when the client is located on a first logical partitioned data processing system with the source virtual input/output server, wherein the client accesses the block storage through the source virtual input/output server. Access for the client to the block storage is migrated to a target virtual input/output server located on a second logical partitioned data processing system using the parameters, wherein the parameters are used on the target virtual input/output server to provide the client access to the block storage when the client is migrated to the second data processing system.

Abstract: A method, apparatus and computer instructions for storing data relating to the switch in a context switch history containing a number of prior context switches occurring prior to a current context. The storing of data occurs in response to a change in context for a direct memory access resource. Portions of the direct memory access chain of requests are freed using the context switch history to form freed portions, wherein the freed portions are reused for requests.

Abstract: A system and method for passing Direct Memory Access (DMA) configuration information from one device driver to another in order to initialize devices for DMA operations are provided. More specifically, a mechanism for passing information, identifying a DMA address space allocated to a child virtual device, from the child virtual device to the virtual I/O (VIO) bus is provided so that DMA operations may be initialized for the child virtual device via the VIO bus. With the system and method, the device driver of the child virtual device passes information regarding the DMAble address space of the child virtual device directly to the device driver of the VIO bus using one of a I/O control (IOCTL) interface and an operating system kernel service. This information is then used by the VIO bus device driver to setup the VIO bus for DMA operations from the child virtual device.

Abstract: Methods, systems, and products are disclosed for implementing a generic kernel extension framework that operate generally to allow one kernel extension to register a function callable by other kernel extensions. A kernel extension can be loaded even if a function it potentially could need is not available. If in fact the running kernel extension does eventually request a function that no other kernel extension has registered to provide, it is failed gracefully with a return error code. The client kernel extension can still function normally, assuming the desired service is non-critical. Example services in the non-critical category may include, for example, advanced error handling functions, statistical functions, reporting functions, and so on, including many others as will occur to those of skill in the art.

Abstract: A method, apparatus and computer instructions for storing data relating to the switch in a context switch history containing a number of prior context switches occurring prior to a current context. The storing of data occurs in response to a change in context for a direct memory access resource. Portions of the direct memory access chain of requests are freed using the context switch history to form freed portions, wherein the freed portions are reused for requests.

Abstract: A method, apparatus, and computer instructions for managing direct memory access transfers. Monitoring is performed for an event to pass ownership of a direct memory access resource to a new thread. A buffer of the new thread is added by an operating system component to the end of a direct memory access chain of requests from the current thread. The addition of this buffer to the end of a direct memory access chain provides an anchor point for the new thread to add additional requests for the direct memory access resource.