Abstract: A switching element that is at least partially implemented in one or more printed wiring boards (PWBs). A plurality of inputs and a plurality of outputs may be integrated into the PWB(s). In some embodiments, a plurality of contact bars may also be comprised in respective contact bar pockets bounded at least partially ab at least one of the PWB(s). The switching element is selectively operable in first and second states, the first state in which at least one contact bar couples one of the plurality of inputs to one of the plurality of outputs such that an analog signal input to the respective input is routed to the respective output and the second state in which at least one contact bar is held in an off state.

Abstract: A switching element that is at least partially implemented in one or more printed wiring boards (PWBs). A plurality of inputs and a plurality of outputs may be integrated into the PWB(s). In some embodiments, a plurality of contact bars may also be comprised in respective contact bar pockets bounded at least partially ab at least one of the PWB(s). The switching element is selectively operable in first and second states, the first state in which at least one contact bar couples one of the plurality of inputs to one of the plurality of outputs such that an analog signal input to the respective input is routed to the respective output and the second state in which at least one contact bar is held in an off state.

Abstract: A switching element that is at least partially implemented in one or more printed wiring boards (PWBs). A first input and a plurality of outputs may be integrated into the PWB(s). In some embodiments, a plurality of contacts may also be integrated into the PWB(s). The switching element is selectively operable in first and second states, the first state in which the first input is coupled to a first output and the second state in which the first input is coupled to a second output.

Abstract: A switch system having a plurality of switch inputs, a plurality of switch outputs, a switch matrix comprising a plurality of N×N switching elements to selectively couple one or more of the plurality of switch inputs to one or more of the plurality of switch outputs during use to provide one or more paths for routing signals from one or more of the switch inputs to one or more of the switch outputs during use.

Abstract: A 2×2 switching element that includes first and second relays each having a first terminal, a second terminal and a third terminal, wherein the first and second relays each operate between a first state to connect the first terminal to the second terminal and a second state to connect the first terminal to the third terminal. The second terminals and third terminals, respectively, of the first and second relays are coupled to one another. The 2×2 switching element is selectively operable between: a first switching state where the first relay is operated in the first state and the second relay is operated in the second state, and a second switching state where the first relay is operated in the second state and the second relay is operated in the second state.

Abstract: A method that includes identifying a desired signal connectivity through a switch matrix, where the switch matrix includes a plurality of switching elements, and where the switching elements are selectively operable in a plurality of states to provide a plurality of signal paths for routing signals through the switch matrix. The method also includes identifying a sorting network model that corresponds to a topology of the switch matrix, applying a sorting algorithm to the sorting network model, and determining, based on the results of applying the sorting algorithm, operational states of the plurality of switching elements to provide signal paths corresponding to the desired signal connectivity.

Abstract: Connecting a plurality of chassis using a rigid connection. A first coupling element of a first chassis may be mated with a first rigid connection. The first coupling element may be positioned on an exterior housing of the first chassis and coupled to a first backplane of the first chassis. A second coupling element of a second chassis may be mated with the first rigid connection. The second coupling element may be positioned on an exterior housing of the second chassis and coupled to a second backplane of the second chassis. Connecting the first chassis and the second chassis may allow the first and second backplanes to communicate analog signals.

Abstract: A switching element that is at least partially implemented in one or more printed wiring boards (PWBs). A first input and a plurality of outputs may be integrated into the PWB(s). In some embodiments, a plurality of contacts may also be integrated into the PWB(s). The switching element is selectively operable in first and second states, the first state in which the first input is coupled to a first output and the second state in which the first input is coupled to a second output.

Abstract: A 2×2 switching element that includes first and second relays each having a first terminal, a second terminal and a third terminal, wherein the first and second relays each operate between a first state to connect the first terminal to the second terminal and a second state to connect the first terminal to the third terminal. The second terminals and third terminals, respectively, of the first and second relays are coupled to one another. The 2×2 switching element is selectively operable between: a first switching state where the first relay is operated in the first state and the second relay is operated in the second state, and a second switching state where the first relay is operated in the second state and the second relay is operated in the second state.

Abstract: A switch system having a plurality of switch inputs, a plurality of switch outputs, a switch matrix comprising a plurality of N×N switching elements to selectively couple one or more of the plurality of switch inputs to one or more of the plurality of switch outputs during use to provide one or more paths for routing signals from one or more of the switch inputs to one or more of the switch outputs during use.

Abstract: A method that includes identifying a desired signal connectivity through a switch matrix, where the switch matrix includes a plurality of switching elements, and where the switching elements are selectively operable in a plurality of states to provide a plurality of signal paths for routing signals through the switch matrix. The method also includes identifying a sorting network model that corresponds to a topology of the switch matrix, applying a sorting algorithm to the sorting network model, and determining, based on the results of applying the sorting algorithm, operational states of the plurality of switching elements to provide signal paths corresponding to the desired signal connectivity.

Abstract: Connecting a plurality of chassis using a rigid connection. A first coupling element of a first chassis may be mated with a first rigid connection. The first coupling element may be positioned on an exterior housing of the first chassis. A second coupling element of a second chassis may be mated with the first rigid connection. The second coupling element may be positioned on an exterior housing of the second chassis. Connecting the first chassis and the second chassis may allow the first and second chassis to communicate.

Abstract: Connecting a plurality of chassis using a rigid connection. A first coupling element of a first chassis may be mated with a first rigid connection. The first coupling element may be positioned on an exterior housing of the first chassis and coupled to a first backplane of the first chassis. A second coupling element of a second chassis may be mated with the first rigid connection. The second coupling element may be positioned on an exterior housing of the second chassis and coupled to a second backplane of the second chassis. Connecting the first chassis and the second chassis may allow the first and second backplanes to communicate analog signals.

Abstract: Connecting a plurality of chassis using a rigid connection. A first coupling element of a first chassis may be mated with a first rigid connection. The first coupling element may be positioned on an exterior housing of the first chassis. A second coupling element of a second chassis may be mated with the first rigid connection. The second coupling element may be positioned on an exterior housing of the second chassis. Connecting the first chassis and the second chassis may allow the first and second chassis to communicate.

Abstract: A dimensionally flexible sparse matrix comprising multiple ports connected to a plurality of interconnected universal switches is disclosed. Each universal switch has at least three terminals and is switchable to connect any pair or all three terminals together. The plurality of interconnected universal switches are independently switchable to connect any one or more ports of the sparse matrix to any subset of the other ports. The sparse matrix may also be configurable to duplicate the connectivity of a variety of dimensionally different switch matrices by designating a first subset of the multiple ports as row ports and a second subset of the remaining ports as column ports with the added flexibility of connecting row-to-row and/or column-to column. The small physical size of signal stubs in the universal switches results in a signal path between any pair of terminals that may be suitable for the transmission of signal frequencies greater than approximately 500 mega-hertz.

Abstract: An N-wire interleaved differential multiplexer. The N-wire interleaved differential multiplexer may be formed by interleaving the channels and corresponding switches of N one-wire multiplexers. Each of the switches of the interleaved differential multiplexer may be controlled independent from the other switches to provide a signal path between a DUT stack and a measurement device. To test a first DUT, two switches of the interleaved multiplexer are closed to connect the terminals of the first DUT to the measurement device. To switch from testing the first DUT to testing a subsequent DUT, one of the previously activated switches is opened, one is kept closed, and a different switch is closed. The testing process may “walk” up or down the switch channels of the interleaved multiplexer one switch at a time to test each of the DUTs of the DUT stack.

Abstract: An N-wire interleaved differential multiplexer. The N-wire interleaved differential multiplexer may be formed by interleaving the channels and corresponding switches of N one-wire multiplexers. Each of the switches of the interleaved differential multiplexer may be controlled independent from the other switches to provide a signal path between a DUT stack and a measurement device. To test a first DUT, two switches of the interleaved multiplexer are closed to connect the terminals of the first DUT to the measurement device. To switch from testing the first DUT to testing a subsequent DUT, one of the previously activated switches is opened, one is kept closed, and a different switch is closed. The testing process may “walk” up or down the switch channels of the interleaved multiplexer one switch at a time to test each of the DUTs of the DUT stack.

Abstract: A dimensionally flexible sparse matrix comprising multiple ports connected to a plurality of interconnected universal switches is disclosed. Each universal switch has at least three terminals and is switchable to connect any pair or all three terminals together. The plurality of interconnected universal switches are independently switchable to connect any one or more ports of the sparse matrix to any subset of the others ports. The sparse matrix may also be cofigurable to duplicate the connectivity of a variety of dimensionally different switch matrices by designating a first subset of the multiple ports as row ports and a second subset of the remaining ports as column ports with the added flexibilty of connecting row-to-row and/or column-to column. The small physical size of signals stubs in the univerals switches results in a signal path between any pair of terminals that may be suitable for the transmission of signal frequencies greater than approximately 500 mega-hertz.

Abstract: A dimensionally flexible sparse matrix comprising multiple ports connected to a plurality of interconnected universal switches is disclosed. Each universal switch has at least three terminals and is switchable to connect any pair or all three terminals together. The plurality of interconnected universal switches are independently switchable to connect any one or more ports of the sparse matrix to any subset of the other ports. The sparse matrix may also be configurable to duplicate the connectivity of a variety of dimensionally different switch matrices by designating a first subset of the multiple ports as row ports and a second subset of the remaining ports as column ports with the added flexibility of connecting row-to-row and/or column-to column. The small physical size of signal stubs in the universal switches results in a signal path between any pair of terminals that may be suitable for the transmission of signal frequencies greater than approximately 500 mega-hertz.

Abstract: A universal switch, comprising a plurality of terminals and a plurality of interconnected independently switchable switches coupled to the terminals, where the plurality of interconnected switches are configurable to connect any subset of the terminals to any other subset of the terminals, and optionally, to disconnect all the terminals. One implementation includes a first terminal, a second terminal, a third terminal, and a plurality of interconnected switches coupled to the terminals. The plurality of interconnected switches are configurable to implement a variety of interconnections between the terminals, including: the first terminal connected only to the second terminal, the first terminal connected only to the third terminal, the second terminal connected only to the third terminal, the first terminal connected to the second terminal and the third terminal, and optionally, all three terminals disconnected.