Abstract: A pair of current sources, each having a high output impedance, are coupled to a pair of first and second inputs of a differential input stage of a vertical deflection amplifier. An output of the amplifier is coupled to a vertical deflection winding. A current sampling resistor is coupled to the first input via a first resistor. The second input is coupled via a second resistor to a terminal of the sampling resistor that is remote from the first resistor. The first and second resistors are matched resistors for providing differential driving.

Abstract: In a D.C. coupled vertical deflection circuit, an input sawtooth signal is coupled to an inverting input of a vertical deflection amplifier via a first resistor network. A D.C. voltage is coupled to a second input of the amplifier via a second resistor network for preventing the D.C. signal component from affecting the deflection current. To provide temperature compensation, for every resistor included in the first resistor network, there is included a corresponding resistor of equal value in the second resistor network.

Abstract: A television receiver is controlled as to the degree of vertical zoom via a deflection current ramp that varies in slope and which may be delayed to achieve panning. Due to the increased slope when zoomed, the deflection current and the electron beam complete a trace in less time than the normal vertical interval. The deflection current is maintained at one extreme or the other outside the trace interval, and the beam is blanked. A retrace signal generator coupled in a feedback loop with the power supply for the deflection circuit determines the midpoint of the blanking period and generates a fast retrace at or near the midpoint. The feedback loop is arranged to minimize the DC average current in the deflection winding by having a current source responsive to the DC average current for charging a timing ramp that triggers retrace upon reaching a threshold. The slope of the timing ramp varies with DC loading, thus advancing or retarding retrace to center retrace in the blanking interval.

Abstract: A differential amplifier formed by a pair of transistors couples a vertical sawtooth signal to an input side of a vertical deflection amplifier. Nonlinearity of the transistor pair provides S-correction in the vertical direction. The current in the transistor pair varies when vertical height is adjusted, in service operation, so that the nonlinearity changes. In a vertical shrink mode of operation, the amplitude of the sawtooth signal is reduced. The nonlinearity associated with a given level of the sawtooth signal that corresponds to a given vertical position in the vertical shrink mode is the same as that associated with the same level of the sawtooth signal in the vertical, non-shrink mode.

Abstract: A differential amplifier formed by a pair of transistor couples a vertical sawtooth signal to an input side of a vertical deflection amplifier. Nonlinearity of the transistor pair provides linearity or S-correction in the vertical direction. The amplitude of the sawtooth signal is adjusted by way of adjusting a vertical height control signal. To compensate for a change in the S-correction that is introduced by the amplitude adjustment, the vertical height control signal is coupled to the emitters of the transistor pairs for controlling the nonlinearity.

Abstract: A first voltage-to-current converter responsive to a picture height adjustment control signal generates a first current in a capacitor for producing a trace portion of a sawtooth signal in the capacitor having a rate of change that is adjustable in accordance with an adjustment of the control signal. A second voltage-to-current converter responsive to the control signal generates a second current in a resistor for producing a third signal that is adjustable in accordance with the control signal. The sawtooth and third signals are coupled via a differential amplifier to a vertical deflection winding to produce a vertical deflection current in accordance with a difference between the sawtooth and third signals such that picture height adjustment does not affect vertical centering.

Abstract: In a vertical sawtooth generator of a D.C. coupled vertical deflection circuit, a vertical deflection amplifier generates a sawtooth signal. Magnitudes of the sawtooth signal in first and second instants of its trace period are determined in accordance with first and second D.C. signals, respectively. The first and second D.C. signals are adjusted during service to control the raster height and the raster centering such that while the raster height is adjusted, raster centering is not significantly affected, and vice versa.

Abstract: In a vertical sync separator, a composite sync signal in which picture information is removed is coupled via a low-pass filter to an input terminal of a comparator having a predetermined threshold level. The comparator produces an output signal when a voltage at the input terminal is more positive than the threshold level, that is indicative of the occurrence of a vertical sync pulse. When any of equalizing and horizontal sync pulses occurs, the comparator output signal is not produced. A negative current source is coupled to the low-pass filter to provide level shifting of the comparator input voltage so as to increase a guard band or noise immunity of the sync separator.

Abstract: A differential amplifier formed by a pair of transistor couples a vertical sawtooth signal to an input side of a vertical deflection amplifier. Nonlinearity of the transistor pair provides linearity or S-correction in the vertical direction.

Abstract: A sawtooth signal generator of a D.C. coupled vertical deflection circuit is responsive, during service mode of operation, to a first signal at a D.C. level that is indicative of vertical centering. During the service mode operation, the generation of the sawtooth signal is disabled and, instead, the generator generates a D.C. signal that is D.C. coupled via a vertical deflection amplifier to a vertical deflection winding in a manner to position an electron beam at the vertical center of a display screen.

Abstract: Retrace pulses are integrated by an R-C network to produce a ramp signal. The resistive member of the R-C network is bypassed by a diode to provide rapid retrace at the conclusion of the ramp portion of the integrated signal. A voltage divider at the output of the integrator adjusts the DC level of the ramp signal without affecting the constant of integration of the R-C network.

Abstract: In a vertical deflection circuit, a vertical deflection current is controlled by a vertical sawtooth signal. A transistor generates a first control signal that is derived by sensing the beam current. The control signal is used for modulating the vertical sawtooth signal to compensate for a tendency of the raster height on a screen of a cathode ray tube to increase when the ultor voltage decreases. The transistor also clamps a second control signal that is indicative of the beam current to a predetermined level when the beam current is smaller than a predetermined value. The second control signal is coupled to an automatic beam current limiter.

Abstract: A television receiver high voltage generator includes a high voltage transformer for developing an ultor accelerating potential at an ultor output terminal. A flyback voltage produced in a winding of the transformer is rectified to produce an ultor accelerating potential representative DC voltage. A high voltage protection circuit comprises a comparator/amplifier stage that level shifts the ultor accelerating potential representative DC voltage and applies the level shifted voltage across a base-emitter junction of a first transistor. The first transistor is coupled to a second transistor to form a latch. When, as a result of excessive ultor accelerating potential, the latch becomes active, the generation of the ultor accelerating potential is disabled. The first and second transistors are interior to an integrated circuit; whereas, the comparator/amplifier stage is exterior to the integrated circuit.

Abstract: A vertical amplifier of a vertical deflection circuit has an output transistor operating as a conductive switch that couples a boosted supply voltage to a vertical deflection winding during vertical retrace. A feedback network that bypasses the deflection winding is coupled between an output terminal and an input terminal of the amplifier to provide a phase lead. A clamping diode is coupled to the feedback network. The clamping diode reduces a magnitude of a feedback signal, during vertical retrace, in a manner to delay an instant in which the output transistor begins operating as an amplifier stage. The lengthening of vertical retrace due to the feedback signal is thereby reduced.

Abstract: A horizontal deflection system comprises a horizontal deflection yoke and a resonant retrace circuit coupled to the yoke and to a switched energy source for generating a horizontal deflection current in the yoke. A diode modulator is coupled to the resonant retrace circuit. A control circuit operable in a switched mode supplies a control signal to the diode modulator for modifying the deflection current to correct for side pincushion distortion. A transformer has a first winding coupled to the diode modulator and to the control circuit for recovering energy from the diode modulator. The transformer has a second winding for receiving the recovered energy from the first winding. A diode clamp is coupled to the second winding and to a load driven by a voltage source at a first voltage level, for transferring the recovered energy from the second winding to the load.

Abstract: A deflection system comprises: a signal generator, an amplifier stage, a negative feedback path and a vertical rate waveform generator. The signal generator is coupled to a source of flyback pulses for developing from energy in the flyback pulses a horizontal rate drive signal having a predetermined and substantially constant DC voltage reference level. The amplifier has a first input coupled for receiving the horizontal rate drive signal and an output coupled to a deflection coil. The amplifier output has a DC voltage reference level corresponding to the DC reference level of the horizonatl rate drive signal. A DC feedback signal on the negative feedback path is related to deflection current. The feedback path is coupled between the coil and a second input of the amplifier. The vertical rate waveform is also coupled to the second input of the amplifier for modulating the horizontal rate drive signal.

Abstract: A parabolic voltage generating circuit includes an arrangement for generating a sawtooth vertical deflection current that flows in a vertical deflection winding, in a DC blocking capacitor and in a deflection current sampling resistor. An emitter electrode of a transistor is coupled between the deflection winding and the capacitor. A base electrode of the transistor is coupled between the capacitor and the resistance. A collector current of the transistor varies in a vertical rate parabolic manner and has a DC average value that is determined by a DC average value of a voltage that is developed in the capacitor. The collector current is applied to an East-West raster distortion correction circuit for modulating an amplitude of a horizontal deflection current.

Abstract: A horizontal deflection circuit includes a flyback transformer. A secondary winding of the flyback transformer is coupled in series with a diode switch to produce a trace rectified supply voltage that energizes a vertical deflection amplifier. The diode switch also provides switching operation in an East-West diode modulator. During, for example, service mode operation, when the vertical raster is collapsed, the trace current in the secondary winding is substantially reduced. The reduced trace current is sensed for producing a control signal that causes the peak current supplied by the diode switch to the diode modulator to be smaller than the trace current in the secondary winding. This ensures that the diode switch remains conductive throughout horizontal trace, thereby, preventing an undesirable increase in the supply voltage from occuring.

Abstract: A regulator coupled to the main supply voltage generates a B+ scan voltage for a horizontal flyback transformer of a horizontal deflection circuit. A supply voltage is developed from a trace voltage in a flyback transformer secondary winding. The supply voltage is indicatiave of the horizontal deflection current amplitude. A decrease in mains supply voltage that cannot be compensated by the regulator, causes a corresponding decrease in the B+ scan and supply voltage and in a horizontal deflection current amplitude. The supply voltage is applied to the series arrangement of first and second resistors and a zener diode. A control voltage developed from the supply voltage, at a junction of the first and second resistors, is applied to a control terminal of a vertical deflection circuit for controlling the amplitude of the vertical deflection current. A decrease in the control voltage produces a greater proportional decrease in the vertical deflection current.

Abstract: In a video display apparatus having an on-screen display feature (OSD), a vertical deflection circuit includes a vertical deflection winding coupled to a DC blocking capacitor. A deflection amplifier responsive to a sawtooth signal is coupled to the vertical deflection winding at an output terminal. A vertical sawtooth voltage generator that generates the sawtooth signal is coupled to an input terminal of the amplifier for driving the output stage at a vertical rate in a sawtooth manner to generate a sawtooth deflection current in the deflection winding. The sawtooth generator includes a capacitor that, during normal operation, is charged in a sawtooth manner via a resistor for developing a sawtooth signal. During a transition interval that follows a user initiated channel selection command, the frequency of the sawtooth signal becomes smaller.