Patents by Inventor James A. Zollo
James A. Zollo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7594318Abstract: A multilayer substrate assembly (80) includes at least one embedded component (52) within a plurality of stacked pre-processed substrates. Each pre-processed substrate can have a core dielectric (14), patterned conductive surfaces (12 and 16) on opposing sides of the core dielectric, and at least one hole (18) in each of at least two adjacently stacked pre-processed substrates such that at least two holes are substantially aligned on top of each other forming a single hole (19). The assembly further includes a processed adhesive layer (48) between top and bottom surfaces of respective pre-processed substrates. The embedded component is placed in the single hole and forms a gap (67 & 66) between the embedded component and a peripheral wall of the single hole. When the assembly is biased, the processed adhesive layer fills the gap to form the assembly having the embedded component cross-secting the plurality of pre-processed substrates.Type: GrantFiled: September 12, 2007Date of Patent: September 29, 2009Assignee: Motorola, Inc.Inventors: James A. Zollo, John K. Arledge, Nitin B. Desai
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Publication number: 20080040921Abstract: A multilayer substrate assembly (80) includes at least one embedded component (52) within a plurality of stacked pre-processed substrates. Each pre-processed substrate can have a core dielectric (14), patterned conductive surfaces (12 and 16) on opposing sides of the core dielectric, and at least one hole (18) in each of at least two adjacently stacked pre-processed substrates such that at least two holes are substantially aligned on top of each other forming a single hole (19). The assembly further includes a processed adhesive layer (48) between top and bottom surfaces of respective pre-processed substrates. The embedded component is placed in the single hole and forms a gap (67 & 66) between the embedded component and a peripheral wall of the single hole. When the assembly is biased, the processed adhesive layer fills the gap to form the assembly having the embedded component cross-secting the plurality of pre-processed substrates.Type: ApplicationFiled: September 12, 2007Publication date: February 21, 2008Applicant: MOTOROLA, INC.Inventors: JAMES ZOLLO, JOHN ARLEDGE, NITIN DESAI
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Patent number: 7286366Abstract: A multilayer substrate assembly (80) includes at least one embedded component (52) within a plurality of stacked pre-processed substrates. Each pre-processed substrate can have a core dielectric (14), patterned conductive surfaces (12 and 16) on opposing sides of the core dielectric, and at least one hole (18) in each of at least two adjacently stacked pre-processed substrates such that at least two holes are substantially aligned on top of each other forming a single hole (19). The assembly further includes a processed adhesive layer (48) between top and bottom surfaces of respective pre-processed substrates. The embedded component is placed in the single hole and forms a gap (67 & 66) between the embedded component and a peripheral wall of the single hole. When the assembly is biased, the processed adhesive layer fills the gap to form the assembly having the embedded component cross-secting the plurality of pre-processed substrates.Type: GrantFiled: March 24, 2005Date of Patent: October 23, 2007Assignee: Motorola, Inc.Inventors: James A. Zollo, John K. Arledge, Nitin B. Desai
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Publication number: 20060215379Abstract: A multilayer substrate assembly (80) includes at least one embedded component (52) within a plurality of stacked pre-processed substrates. Each pre-processed substrate can have a core dielectric (14), patterned conductive surfaces (12 and 16) on opposing sides of the core dielectric, and at least one hole (18) in each of at least two adjacently stacked pre-processed substrates such that at least two holes are substantially aligned on top of each other forming a single hole (19). The assembly further includes a processed adhesive layer (48) between top and bottom surfaces of respective pre-processed substrates. The embedded component is placed in the single hole and forms a gap (67 & 66) between the embedded component and a peripheral wall of the single hole. When the assembly is biased, the processed adhesive layer fills the gap to form the assembly having the embedded component cross-secting the plurality of preprocessed substrates.Type: ApplicationFiled: March 24, 2005Publication date: September 28, 2006Applicant: Motorola, Inc.Inventors: James Zollo, John Arledge, Nitin Desai
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Publication number: 20060146027Abstract: A keypad assembly for an electronic device where characters are displayed on the buttons has a flexible display laminate (105). The flexible display laminate has a driver layer (106) on which button regions of conductor (300) are formed. Surrounding the button regions are conductorless regions (312). The lack of conductor in the surrounding regions allows appropriate tactile feedback to a user when the user depresses an actuating member (112), through which character formed by the flexible display laminate may be seen, actuating a popple switch circuit which allows the device to detect the button press.Type: ApplicationFiled: December 31, 2004Publication date: July 6, 2006Inventors: James Tracy, James Zollo
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Publication number: 20060103404Abstract: A system includes a temperature chamber (100), a text fixture (402), a test coupon (400), a data acquisition unit (404), an ohmmeter (406) and a computer (410). The temperature chamber (100) provides temperature extremes to the test coupon (400). The test coupon (400) includes a substrate (314), one or more vias (418-429) and traces (402-412) connecting the vias. The data acquisition unit (404) continuously measures a resistance value of the circuit formed by the vias (418-429) and traces (402-412) during temperature cycling of the test coupon (400) held by the test fixture (402). The ohmmeter (406) measures the temperature of the test coupon (400) with a thermocouple. The data is used to detect failures of the materials in the test coupon (400) during the temperature cycling.Type: ApplicationFiled: November 12, 2004Publication date: May 18, 2006Applicant: MOTOROLA, INC.Inventors: Nitin Desai, Paul Crandall, Ilya Lisak, Robert Mulligan, James Tracy, James Zollo
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Patent number: 7025596Abstract: A method and apparatus form electrical connections between electronic circuits and conductive threads (102, 104, 106, 108) that are interwoven into textile material (130). Electronic circuits (128), such as semiconductor dies, are connected to a carrier (132) and electrical connections (136) are made to conductive connection areas (110, 112, 114, 116) on the carrier (132). Conductive stitching (202, 204, 206, 208) provides electrical contacts for both the conductive connection areas (110, 112, 114, 116) on the carrier (132) and the conductive threads (102, 104, 106, 108) that are interwoven into the textile material (130). Optionally, a thin, flexible substrate material (132) is perforated during the stitching process.Type: GrantFiled: June 14, 2004Date of Patent: April 11, 2006Assignee: Motorola, Inc.Inventors: James A. Zollo, Bonnie J. Bachman, Alan R. Beatty, Stephen O. Bozzone, Nitin B. Desai, Ronald J. Kelley, Rami C. Levy
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Publication number: 20050277307Abstract: A method and apparatus form electrical connections between electronic circuits and conductive threads (102, 104, 106, 108) that are interwoven into textile material (130). Electronic circuits (128), such as semiconductor dies, are connected to a carrier (132) and electrical connections (136) are made to conductive connection areas (110, 112, 114, 116) on the carrier (132). Conductive stitching (202, 204, 206, 208) provides electrical contacts for both the conductive connection areas (110, 112, 114, 116) on the carrier (132) and the conductive threads (102, 104, 106, 108) that are interwoven into the textile material (130). Optionally, a thin, flexible substrate material (132) is perforated during the stitching process.Type: ApplicationFiled: June 14, 2004Publication date: December 15, 2005Applicant: MOTOROLA, INC.Inventors: James Zollo, Bonnie Bachman, Alan Beatty, Stephen Bozzone, Nitin Desai, Ronald Kelley, Rami Levy
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Patent number: 6972382Abstract: A multilayer circuit board (50) includes a plurality of substrate cores (34 and 44), an adhesive/bonding layer (55) between at least two among the plurality of substrate cores, and a microvia (35 and 45) in each of at least two of the plurality of substrate cores. The microvia includes a conductive interconnection (39) between a top conductive surface and a bottom conductive surface of each of the plurality of substrate cores and the microvia in a first substrate core is arranged to be inverted relative to a microvia in a second substrate core. The multilayer circuit board can further include a plated through-hole (54) through the plurality of substrate cores and the adhesive/bonding layer such that at least two among the top conductive surfaces (32 or 46) and the bottom conductive surfaces (36 or 42) of the plurality of substrate cores are connected.Type: GrantFiled: July 24, 2003Date of Patent: December 6, 2005Assignee: Motorola, Inc.Inventors: James A. Zollo, Nitin B. Desai
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Publication number: 20050243522Abstract: A multi-purpose product packaging (100, 200) for an electronic host product (250) having its own casing can include an apparatus casing (110, 210) for removably and substantially encasing the electronic host product, circuitry (240) within the apparatus casing for providing at least one function to the electronic host product, and an interface (255) on the apparatus casing for enabling the at least one function to operate in conjunction with the electronic product. The apparatus casing can be made of recyclable products and the interface can form a portion of the circuitry within the apparatus casing. In one embodiment, the electronic host device can be a phone and the circuitry can provide any number of functions including the function of charging a power source within the phone.Type: ApplicationFiled: April 30, 2004Publication date: November 3, 2005Applicant: Motorola, Inc.Inventors: Ryan Nilsen, James Tracy, Nitin Desai, James Zollo
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Patent number: 6928726Abstract: A substrate assembly (10) and method of making same has at least one embedded component (25) in a via (24) of a substrate core (22) and includes a first adhesive layer (20) coupled to the substrate core, and a second adhesive layer (26) on at least portions of a top surface of the substrate core and above portions of the embedded component. The substrate assembly can further include a first conductive layer (18) adhered to the bottom surface of the substrate core and a second conductive layer (28) on the second adhesive layer. The substrate assembly can further include an interconnection (36) between a conductive surface of the embedded component and at least one among the first conductive layer and the second conductive layer. The interconnection can be formed through an opening (34) that at least temporarily exposes at least a conductive surface (32) of the embedded component.Type: GrantFiled: July 24, 2003Date of Patent: August 16, 2005Assignee: Motorola, Inc.Inventors: James A. Zollo, John K. Arledge, John C. Barron, Gary R. Burhance, John Holley, Henry F. Liebman
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Publication number: 20050016768Abstract: A multilayer circuit board (50) includes a plurality of substrate cores (34 and 44), an adhesive/bonding layer (55) between at least two among the plurality of substrate cores, and a microvia (35 and 45) in each of at least two of the plurality of substrate cores. The microvia includes a conductive interconnection (39) between a top conductive surface and a bottom conductive surface of each of the plurality of substrate cores and the microvia in a first substrate core is arranged to be inverted relative to a microvia in a second substrate core. The multilayer circuit board can further include a plated through-hole (54) through the plurality of substrate cores and the adhesive/bonding layer such that at least two among the top conductive surfaces (32 or 46) and the bottom conductive surfaces (36 or 42) of the plurality of substrate cores are connected.Type: ApplicationFiled: July 24, 2003Publication date: January 27, 2005Inventors: James Zollo, Nitin Desai
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Publication number: 20050016763Abstract: A substrate assembly (10) and method of making same has at least one embedded component (25) in a via (24) of a substrate core (22) and includes a first adhesive layer (20) coupled to the substrate core, and a second adhesive layer (26) on at least portions of a top surface of the substrate core and above portions of the embedded component. The substrate assembly can further include a first conductive layer (18) adhered to the bottom surface of the substrate core and a second conductive layer (28) on the second adhesive layer. The substrate assembly can further include an interconnection (36) between a conductive surface of the embedded component and at least one among the first conductive layer and the second conductive layer. The interconnection can be formed through an opening (34) that at least temporarily exposes at least a conductive surface (32) of the embedded component.Type: ApplicationFiled: July 24, 2003Publication date: January 27, 2005Inventors: James Zollo, John Arledge, John Barron, Gary Burhance, John Holley, Henry Liebman
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Publication number: 20030058223Abstract: An adaptable keypad or button utilizes a display laminate made up of a driving layer (108), an electrically active ink layer (110), and a transparent conductor layer (112). In a preferred embodiment, the display laminate is placed between a switch (302, 303, 304) and an actuating member. The driving layer has a series of symbols or characters created by conductor patterns (202, 204, 208, 210) in the shape of the symbols or characters. Some of the conductor segments are used exclusively by one character, some are used exclusively by another character, and some may be common to both characters. The conductors making up the desired character or symbol to be displayed are electrically energized, causing a corresponding pattern in the electrically active ink layer to appear.Type: ApplicationFiled: January 23, 2002Publication date: March 27, 2003Inventors: James L. Tracy, James A. Zollo, Bharat N. Vakil
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Patent number: 6452811Abstract: Methods and apparatus for adding additional circuitry (19) to a circuit board (11) having a radiation shield (14) associated therewith include the additional circuitry (19) mounted onto a flex circuit (21) which in turn is mounted on the radiation shield (14). A conductor (32) containing portion (24) of the flex circuit (21) extends therefrom and is routed around and through a cutout (18) in the bottom surface of the radiation shield (14). The conductor (32) is connected to the printed circuit board (11) at the location of the cutout (18) in the radiation shield (14).Type: GrantFiled: September 1, 2000Date of Patent: September 17, 2002Assignee: Motorola, Inc.Inventors: James L. Tracy, James A. Zollo
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Patent number: 5495450Abstract: An integrated circuit (106) having an optically erasable portion (114) is joined to a substrate (102) such that the optically erasable portion faces the substrate. The substrate (102) includes an aperture (104) that exposes the optically erasable portion (114) of the integrated circuit providing erasing capability to the integrated circuit (106). A plug (110) impermeable to light may be inserted into the aperture (104) to provide a sealed window to the optically erasable portion (114) of the integrated circuit (106).Type: GrantFiled: November 25, 1994Date of Patent: February 27, 1996Assignee: Motorola, Inc.Inventors: James A. Zollo, Barbara R. Doutre, Rudy Yorio
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Patent number: 5410181Abstract: An integrated circuit (106) having an optically erasable portion (114) is joined to a substrate (102) such that the optically erasable portion faces the substrate. The substrate (102) includes an aperture (104) that exposes the optically erasable portion (114) of the integrated circuit providing erasing capability to the integrated circuit (106). A plug (110) impermeable to light may be inserted into the aperture (104) to provide a sealed window to the optically erasable portion (114) of the integrated circuit (106).Type: GrantFiled: June 20, 1994Date of Patent: April 25, 1995Assignee: Motorola, Inc.Inventors: James A. Zollo, Barbara R. Doutre, Rudy Yorio
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Patent number: 5172303Abstract: A stackable surface mount electronic component assembly 100 allowing for the stacking of electronic components 108, and 112 is disclosed. The stackable surface mount electronic component assembly 100 includes electronic component carriers 102, and 114, each having an electronic component 108, and 112 respectively. The two carriers 102, and 114, are electrically interconnected by the use of solder balls 106. Electronic component carrier 114 is in turn attached to an external printed circuit board by the use of solder balls 110. Optionally, each of the electronic components 108, 112 can be encapsulated using encapsulation material prior to the joining of the two carriers 102, and 114. In an alternate embodiment recesses 302 are located on top of the elevated peripheral edge 116 allowing for the proper alignment of the two carriers 102, and 114.Type: GrantFiled: November 23, 1990Date of Patent: December 15, 1992Assignee: Motorola, Inc.Inventors: Lonnie L. Bernardoni, James A. Zollo, Kenneth R. Thompson