Patents by Inventor James Alastair Southern
James Alastair Southern has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10235213Abstract: A process migration method comprising executing a computer program using a group of parallel processes, each process carrying out a computation, the execution using current computing resources to provide current group data as a result of the computations, deciding to change the resources, and making a choice between increasing the resources; decreasing the resources; and moving to different resources, wherein moving to different resources can include increase, decrease or maintenance of the resources. The method comprising communication between the current computing resources and changed computing resources to allow the program to execute on the changed resources, the communication comprising migration of the execution to changed resources and synchronization of migrated group data with the current group data; wherein execution using the current resources overlaps in time with the communication.Type: GrantFiled: July 27, 2015Date of Patent: March 19, 2019Assignee: FUJITSU LIMITEDInventors: James Alastair Southern, Peter Chow
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Patent number: 10191779Abstract: A controller to instruct execution in an environment of plural computing resources. The controller comprising: an information collecting unit to collect available resource information of computing resources available to execute an application indicating an amount and/or type of computing resource available in categories of computing resource; scalability information including an indication of application execution rate; and performance target information including an indication of performance targets. The controller further comprises: a configuration selection unit to select a configuration which will come closest to meeting, the performance targets; and an instructing unit to instruct the execution of the application using the selected configuration.Type: GrantFiled: July 10, 2015Date of Patent: January 29, 2019Assignee: FUJITSU LIMITEDInventors: Serban Georgescu, David Snelling, Nicholas Wilson, James Alastair Southern
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Patent number: 9910717Abstract: A synchronization method in a computer system with multiple cores, wherein a group of threads executes in parallel on a plurality of cores, the group of threads being synchronized using barrier synchronization in which each thread in the group waits for all the others at a barrier before progressing; the group of threads executes until a first thread reaches the barrier; the first thread enters a polling state, repeatedly checking for a release condition indicating the end of the barrier; subsequent threads to reach the barrier are moved to the core on which the first thread is executing; and other cores are powered down as the number of moved threads increases; and wherein when the first thread detects the release condition, the powered down cores are powered up and are available for use by the threads.Type: GrantFiled: November 26, 2014Date of Patent: March 6, 2018Assignee: FUJITSU LIMITEDInventors: Nicholas Wilson, James Alastair Southern
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Patent number: 9852033Abstract: A method of recovering application data from the memory of a failed node in a computer system comprising a plurality of nodes connected by an interconnect and of writing the application data to a replacement node; wherein a node of the computer system executes an application which creates application data storing the most recent state of the application in a node memory; the node fails; the node memory of the failed node is then controlled using a failover memory controller; and the failover memory controller copies the application data from the node memory of the failed node to a node memory of the replacement node over the interconnect.Type: GrantFiled: November 6, 2014Date of Patent: December 26, 2017Assignee: FUJITSU LIMITEDInventors: James Alastair Southern, Nicholas Wilson
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Patent number: 9553823Abstract: A process migration method comprising executing a computer program on current computing resources, in a current partition of computations to parallel processes, each parallel process carrying out at least one computation; communicating current partition data to intermediate computing resources; using the intermediate computing resources to calculate new partition data including a new allocation of computations to processes for use on changed computing resources; and migrating the process execution to the changed computing resources by communicating the new partition data to the changed computing resources.Type: GrantFiled: April 30, 2014Date of Patent: January 24, 2017Assignee: FUJITSU LIMITEDInventors: James Alastair Southern, Nicholas Wilson, Serban Georgescu, Peter Chow
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Patent number: 9454447Abstract: A method of injecting hardware faults into execution of an application in a distributed computing system comprising hardware components including linked nodes, the method comprising: loading an enhanced software stack allowing faults to be injected by deactivating or degrading hardware components as a result of fault triggers; running a fault-trigger daemon on each of the nodes; providing the fault trigger for a degradation or deactivation using one of the daemons to trigger a layer of the software stack controlling a hardware component to inject a fault into the hardware component; and continuing execution of the application with the injected fault.Type: GrantFiled: December 31, 2014Date of Patent: September 27, 2016Assignee: FUJITSU LIMITEDInventor: James Alastair Southern
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Patent number: 9262271Abstract: A method of improving fault tolerance in a computing system arranged to find a computational solution, the method comprising: computing at least two versions of the solution by using a hierarchy of at least two different solvers in parallel; and if there is a fault during execution of a solver resulting in a missing value, substituting a value from a solver that is lower in the hierarchy to replace the missing value.Type: GrantFiled: April 29, 2014Date of Patent: February 16, 2016Assignee: FUJITSU LIMITEDInventor: James Alastair Southern
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Publication number: 20150331721Abstract: A process migration method comprising executing a computer program using a group of parallel processes, each process carrying out a computation, the execution using current computing resources to provide current group data as a result of the computations, deciding to change the resources, and making a choice between increasing the resources; decreasing the resources; and moving to different resources, wherein moving to different resources can include increase, decrease or maintenance of the resources. The method comprising communication between the current computing resources and changed computing resources to allow the program to execute on the changed resources, the communication comprising migration of the execution to changed resources and synchronization of migrated group data with the current group data; wherein execution using the current resources overlaps in time with the communication.Type: ApplicationFiled: July 27, 2015Publication date: November 19, 2015Applicant: FUJITSU LIMITEDInventors: James Alastair SOUTHERN, Peter CHOW
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Publication number: 20150317189Abstract: A controller to instruct execution in an environment of plural computing resources. The controller comprising: an information collecting unit to collect available resource information of computing resources available to execute an application indicating an amount and/or type of computing resource available in categories of computing resource; scalability information including an indication of application execution rate; and performance target information including an indication of performance targets. The controller further comprises: a configuration selection unit to select a configuration which will come closest to meeting, the performance targets; and an instructing unit to instruct the execution of the application using the selected configuration.Type: ApplicationFiled: July 10, 2015Publication date: November 5, 2015Applicant: FUJITSU LIMITEDInventors: Serban Georgescu, David Snelling, Nicholas Wilson, James Alastair Southern
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Publication number: 20150309845Abstract: A synchronization method in a computer system with multiple cores, wherein a group of threads executes in parallel on a plurality of cores, the group of threads being synchronised using barrier synchronisation in which each thread in the group waits for all the others at a barrier before progressing; the group of threads executes until a first thread reaches the barrier; the first thread enters a polling state, repeatedly checking for a release condition indicating the end of the barrier; subsequent threads to reach the barrier are moved to the core on which the first thread is executing; and other cores are powered down as the number of moved threads increases; and wherein when the first thread detects the release condition, the powered down cores are powered up and are available for use by the threads.Type: ApplicationFiled: November 26, 2014Publication date: October 29, 2015Applicant: FUJITSU LIMITEDInventors: Nicholas Wilson, James Alastair Southern
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Publication number: 20150309893Abstract: A method of recovering application data from the memory of a failed node in a computer system comprising a plurality of nodes connected by an interconnect and of writing the application data to a replacement node; wherein a node of the computer system executes an application which creates application data storing the most recent state of the application in a node memory; the node fails; the node memory of the failed node is then controlled using a failover memory controller; and the failover memory controller copies the application data from the node memory of the failed node to a node memory of the replacement node over the interconnect.Type: ApplicationFiled: November 6, 2014Publication date: October 29, 2015Applicant: FUJITSU LIMITEDInventors: James Alastair SOUTHERN, Nicholas WILSON
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Patent number: 9078593Abstract: An ultrasound probe device including an array of transducers, at least one of which is movable relative to at least one of the other transducers. Each movable transducer may be movable relative to at least one of the other transducers along one axis of movement only, preferably parallel with an initial direction of travel of emitted ultrasound waves relative to the device.Type: GrantFiled: February 5, 2009Date of Patent: July 14, 2015Assignee: FUJITSU LIMITEDInventor: James Alastair Southern
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Publication number: 20150193319Abstract: A method of injecting hardware faults into execution of an application in a distributed computing system comprising hardware components including linked nodes, the method comprising: loading an enhanced software stack allowing faults to be injected by deactivating or degrading hardware components as a result of fault triggers; running a fault-trigger daemon on each of the nodes; providing the fault trigger for a degradation or deactivation using one of the daemons to trigger a layer of the software stack controlling a hardware component to inject a fault into the hardware component; and continuing execution of the application with the injected fault.Type: ApplicationFiled: December 31, 2014Publication date: July 9, 2015Applicant: FUJITSU LIMITEDInventor: James Alastair SOUTHERN
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Publication number: 20140359130Abstract: A process migration method comprising executing a computer program on current computing resources, in a current partition of computations to parallel processes, each parallel process carrying out at least one computation; communicating current partition data to intermediate computing resources; using the intermediate computing resources to calculate new partition data including a new allocation of computations to processes for use on changed computing resources; and migrating the process execution to the changed computing resources by communicating the new partition data to the changed computing resources.Type: ApplicationFiled: April 30, 2014Publication date: December 4, 2014Applicant: FUJITSU LIMITEDInventors: James Alastair SOUTHERN, Nicholas WILSON, Serban GEORGESCU, Peter CHOW
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Publication number: 20140344618Abstract: A method of improving fault tolerance in a computing system arranged to find a computational solution, the method comprising: computing at least two versions of the solution by using a hierarchy of at least two different solvers in parallel; and if there is a fault during execution of a solver resulting in a missing value, substituting a value from a solver that is lower in the hierarchy to replace the missing value.Type: ApplicationFiled: April 29, 2014Publication date: November 20, 2014Applicant: FUJITSU LIMITEDInventor: James Alastair SOUTHERN
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Publication number: 20090221917Abstract: The present invention relates to an ultrasound probe device. A device 100 embodying the present invention comprises an array of transducers 102, at least one of which is movable relative to at least one of the other transducers 102. Preferably, the or each movable transducer may be movable relative to at least one of the other transducers along one axis of movement only. This axis of movement is preferably parallel with an initial direction of travel of emitted ultrasound waves relative to the device.Type: ApplicationFiled: February 5, 2009Publication date: September 3, 2009Applicant: FUJITSU LIMITEDInventor: James Alastair Southern