Abstract: A system and method to achieve low power and/or low supply operation of a delta-sigma modulator by taking advantage of the inherent virtual ground of the delta-sigma loop to make the input to a low power integrator small and largely independent of the input signal. This results in improved linearity of the integrator and relaxed constraints on the supply for the first stage integrator. The architecture also enables direct access to the quantization error of the feedback loop and thus can be used to either/or: 1. Calibrate the modulator, 2. Achieve reduced quantization noise, 3. Stabilize the loop by compensating for excess loop delay. Low voltage common-mode-feedback is also achieved using the techniques described.

Abstract: A system and method to achieve low power and/or low supply operation of a delta-sigma modulator by taking advantage of the inherent virtual ground of the delta-sigma loop to make the input to a low power integrator small and largely independent of the input signal. This results in improved linearity of the integrator and relaxed constraints on the supply for the first stage integrator. The architecture also enables direct access to the quantization error of the feedback loop and thus can be used to either/or: 1. Calibrate the modulator, 2. Achieve reduced quantization noise, 3. Stabilize the loop by compensating for excess loop delay. Low voltage common-mode-feedback is also achieved using the techniques described.

Abstract: Disclosed is a frequency-locked loop (FLL), which attempts to bring about frequency and phase synchronization between two signals over the control bandwidth of the loop: a reference signal and a voltage-controlled oscillator (VCO) signal. For example, the FLL employs a reference signal generated by a crystal oscillator of frequency fREF and a VCO signal generated by the oscillations of an unquenched SRG resonator with tunable resonant frequency fRES. These signals are connected to the inputs of a phase/frequency detector (PFD) which produces output pulses in response to the relationship between fREF and fRES. These pulses are applied to a loop filter (LF) which creates a voltage using some kind of charge-storage element. This loop filter voltage is a so-called error voltage whose value is used to control the frequency of the resonator to bring the reference signal and VCO signal into phase synchrony.