Abstract: A system and method for passing data between a first device driver and a second device driver. Data to be provided to the second device driver is identified in the first device driver. A data exchange interface within a kernel space is invoked by the first device driver. The data exchange interface initializes a physical to Direct Memory Access (DMA) address translation table for the child device based on an identifier of a direct memory access window. The data is provided to the data exchange interface. The data exchange interface, in the kernel space, writes the data to a data structure maintained and used by the second device driver.

Abstract: A method, apparatus, and computer instructions for managing direct memory access transfers. Monitoring is performed for an event to pass ownership of a direct memory access resource to a new thread. A buffer of the new thread is added by an operating system component to the end of a direct memory access chain of requests from the current thread. The addition of this buffer to the end of a direct memory access chain provides an anchor point for the new thread to add additional requests for the direct memory access resource.

Abstract: A method and system for controlling access to an adapter, such as a graphics adapter, are disclosed. The method includes querying an adapter lock with a first thread. Thereafter, responsive to determining that the lock indicates the first thread does not have access to the adapter, a sequence to obtain access to the adapter is initiated where the sequence includes writing the adapter context corresponding to the first thread. The, sequence may include a ring 3 to ring 0 transition. The method also includes, in response to determining that the lock indicates the first thread has access to the adapter, communicating to the adapter with the first thread without invoking the sequence to obtain access to the adapter. In one embodiment, querying the adapter lock includes writing a first word of the adapter lock using an atomic operation.

Abstract: A computer system having a graphics display with texture management employs a graphics adapter with texture memory. The graphics adapter is ‘virtualized’ by the operating system. When making a graphics context switch, the state of the graphics adapter including texture memory is saved. Threads are used to allow rapid and frequent context switches. A graphics process that will use texture memory in the adapter reserves a thread, for use during a graphics context switch. The thread calls into the operating system where it is blocked until a graphics context switch is initiated. At that time, the thread is unblocked to do texture management, such as saving of texture memory. During the save portion of the graphics context switch the graphics driver saves the current hardware state of the adapter, and the special purpose texture thread is unblocked to allow texture memory to be processed, and saves texture memory and calls back into the driver where it is blocked.

Abstract: A computer system has a graphics subsystem employing a rasterizer and a frame buffer, with a digital-to-analog converter for producing drive signals to a video display. A bus interface acts as a gateway between a PCI bus and the graphics subsystem; this interface manages commands and DMAs passing between the host processor and various parts of the graphics subsystem. Within the interface, two command FIFOs are employed, one for storing commands/data sent from the host for 2D display (window management) and another for 3D applications. Using two command FIFOs eliminates the need for host semaphore, FIFO draining, and the latency associated with these operations. Timers are provided in the interface, associated with the two command FIFOs, to manage and regulate the frequency with which the system automatically switches between 2D and 3D FIFO processing. Host intervention is minimized by use of a context macro store for holding locally the sequences for context save and context restore which are used repeatedly.