Patents by Inventor James Antone

James Antone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7538823
    Abstract: A method of separating a chroma data component from a video data stream includes determining a phase relationship between a color burst in digital video data samples of a composite video signal and a local clock signal which processes the digital video data samples. In response to determining the phase relationship, interpolation filtering is performed on the digital video data samples corresponding to first and second display lines to generate phase aligned video data samples. Adaptive filtering is then performed utilizing the phase aligned video data samples corresponding to the first and second display lines to separate the chroma component from the digital video data samples corresponding to the first display line.
    Type: Grant
    Filed: September 23, 2005
    Date of Patent: May 26, 2009
    Assignee: Cirrus Logic, Inc.
    Inventors: Rahul Singh, James Antone, John Laurence Melanson, Daniel O. Gudmundson
  • Publication number: 20060078054
    Abstract: Video decoder systems in which both the analog-to-digital converter and the composite decoder are driven by the stable sample clock, such as a crystal source. The outputs of the composite decoder are provided to a source rate converter, having an output that is provided to a digital output formatter. The digital output formatter is driven by the output clock, which may be locked to the source clock if desired. The output clock is developed by a clock generator which may be one of several different types, including a fractional N synthesizer, a direct digital synthesizer or a puncture clock.
    Type: Application
    Filed: October 13, 2004
    Publication date: April 13, 2006
    Inventors: Daniel Gudmundson, John Melanson, Rahul Singh, James Antone, Ahsan Chowdhury, Krishnan Subramoniam
  • Publication number: 20060044468
    Abstract: A single-chip video decoder includes a primary data path for capturing and slicing vertical blanking interval information carried by a primary channel of video data received by a video decoder. Power control circuitry is operable during an inactive period of the video decoder to activate the primary data path during vertical blanking intervals of the received primary channel of video data for capturing and slicing the vertical blanking interval data; and to deactivate the primary data path between the vertical blanking interval and a subsequent vertical blanking interval of the received primary channel of video data to reduce power consumption. According to further inventive concepts, analog and/or digital circuitry which is unnecessary for capturing and slicing the vertical blanking information, including data paths processing secondary channels of video data, is deactivated during substantially the entire inactive period of the video decoder.
    Type: Application
    Filed: January 24, 2005
    Publication date: March 2, 2006
    Applicant: Cirrus Logic, Inc.
    Inventors: Ahsan Chowdhury, James Antone, Krishnan Subramoniam