Patents by Inventor James B. Barton

James B. Barton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6552573
    Abstract: A reduced-leakage current dynamic circuit (10) is disclosed that includes a logic circuit (30), a pre-charge transistor (32), and a standby transistor (40). The logic circuit (30) is coupled to an internal output node (50). The logic circuit (30) includes a plurality of logic transistors (60 and 62) having a low threshold voltage. The pre-charge transistor (32) is coupled to the internal output node (50). The pre-charge transistor (32) is operable to provide a pre-charge voltage at the internal output node (50) and has a standard threshold voltage. The standby transistor (40) is coupled to the internal output node (50). The standby transistor (40) is operable to provide a standby voltage at the internal output node (50).
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: April 22, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: James B. Barton
  • Patent number: 4072978
    Abstract: MOSFET structures are frequently used to establish the charge level in the first potential well of a CCD in accordance with an external voltage. When employed conventionally there exists a finite amount of charge under the MOSFET gate at the instant of turnoff. An indeterminate amount of this charge flows into the first potential well thereby giving rise to an uncertainty in the amount of charge in the well. Use of the invention disclosed eliminates this source of uncertainty.
    Type: Grant
    Filed: July 11, 1977
    Date of Patent: February 7, 1978
    Assignee: Texas Instruments Incorporated
    Inventors: Dennis D. Buss, Stephen P. Emmons, James B. Barton
  • Patent number: 3947698
    Abstract: A charge coupled device analog multiplexer in which a CCD shift register is characterized by an array of sets of phase electrodes. A plurality of charge packet injection input channels lead to an electrode in each of preselected sets in the array. A transfer gate common to all input channels admits charge packets to the array. A clock applies shift voltages to the array to move said charge packets to the multiplexer output where detector means responds to charge packets appearing at the output.
    Type: Grant
    Filed: September 17, 1973
    Date of Patent: March 30, 1976
    Assignee: Texas Instruments Incorporated
    Inventors: Tom F. Cheek, Jr., James B. Barton
  • Patent number: D412955
    Type: Grant
    Filed: February 5, 1998
    Date of Patent: August 17, 1999
    Assignee: The Hill Shot, LLC
    Inventors: Garry W. Koch, Larry W. Koch, James B. Barton, III, Joseph B. Johnston, Jr.