Patents by Inventor James B. Boyce

James B. Boyce has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8058182
    Abstract: Method and device for forming a membrane includes providing a glass substrate, and depositing a thin layer of chromium on the glass substrate. The thin layer of chromium is patterned to form a deflection electrode and interconnect leads. A sacrificial layer of aluminum is deposited on top of the patterned chromium layer, then the sacrificial layer is patterned to define anchor regions. On top of the sacrificial layer, a thick layer of chromium is deposited, and the thick layer of chromium is patterned to form a membrane. The sacrificial layer is then etched to release the membrane.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: November 15, 2011
    Assignee: Xerox Corporation
    Inventors: Chingwen Yeh, James B. Boyce, Kathleen Boyce, legal representative, Jingkuang Chen, Feixia Pan, Joel A. Kubby
  • Publication number: 20110003405
    Abstract: Method and device for forming a membrane includes providing a glass substrate, and depositing a thin layer of chromium on the glass substrate. The thin layer of chromium is patterned to form a deflection electrode and interconnect leads. A sacrificial layer of aluminum is deposited on top of the patterned chromium layer, then the sacrificial layer is patterned to define anchor regions. On top of the sacrificial layer, a thick layer of chromium is deposited, and the thick layer of chromium is patterned to form a membrane. The sacrificial layer is then etched to release the membrane.
    Type: Application
    Filed: July 1, 2009
    Publication date: January 6, 2011
    Applicant: XEROX CORPORATION
    Inventors: Chingwen Yeh, James B. Boyce, Kathleen Boyce, Jingkuang Chen, Feixia Pan, Joel A. Kubby
  • Patent number: 7863703
    Abstract: A high fill-factor photosensor array is formed comprising a P-layer, an I-layer, one or more semiconductor structures adjacent to the I-layer and each coupled to a N-layer, an electrically conductive electrode formed on top of the P-layer, and an additional semiconductor structure, adjacent to the N-layer and which is electrically connected to a voltage bias source. The bias voltage applied to the additional semiconductor structure charges the additional semiconductor structure, thereby creating a tunneling effect between the N-layer and the P-layer, wherein electrons leave the N-layer and reach the P-layer and the electrically conductive layer. The electrons then migrate and distribute uniformly throughout the electrically conductive layer, which ensures a uniform bias voltage across to the entire photosensor array. The biasing scheme in this invention allows to achieve mass production of photosensors without the use of wire bonding.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: January 4, 2011
    Assignee: Xerox Corporation
    Inventors: JengPing Lu, James B. Boyce, Kathleen Dore Boyce, legal representative
  • Patent number: 7863704
    Abstract: A high fill-factor photosensor array is formed comprising a P-layer, an I-layer, one or more semiconductor structures adjacent to the I-layer and each coupled to a N-layer, an electrically conductive electrode formed on top of the P-layer, and an additional semiconductor structure, adjacent to the N-layer and which is electrically connected to a voltage bias source. The bias voltage applied to the additional semiconductor structure charges the additional semiconductor structure, thereby creating a tunneling effect between the N-layer and the P-layer, wherein electrons leave the N-layer and reach the P-layer and the electrically conductive layer. The electrons then migrate and distribute uniformly throughout the electrically conductive layer, which ensures a uniform bias voltage across to the entire photosensor array. The biasing scheme in this invention allows to achieve mass production of photosensors without the use of wire bonding.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: January 4, 2011
    Assignee: Xerox Corporation
    Inventors: JengPing Lu, James B. Boyce, Kathleen Dore Boyce, legal representative
  • Patent number: 7710371
    Abstract: Cells can include variable volumes defined between a flexible structure, such as a polymer layer, and a support surface, with the flexible structure and support surface being attached in a first region that surrounds a second region in which they are unattached. Various adhesion structures can attach the flexible structure and the support surface. When unstretched, the flexible structure can lie in a flat position on the support surface. In response to a stretching force away from the support surface, the flexible structure can move out of the flat position, providing the variable volume. Electrodes, such as on the flexible structure, on the support surface, and over the flexible structure, can have charge levels that couple with each other and with the variable volume. A support structure can include a device layer with signal circuitry that provides a signal path between an electrode and external circuitry. One or more ducts can provide fluid communication with each cell's variable volume.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: May 4, 2010
    Assignee: Xerox Corporation
    Inventors: Ping Mei, Jurgen Daniel, James B. Boyce, Kathleen Dore Boyce, legal representative, Jackson Ho, Rachel Lau, Yu Wang
  • Publication number: 20090160007
    Abstract: A high fill-factor photosensor array is formed comprising a P-layer, an I-layer, one or more semiconductor structures adjacent to the I-layer and each coupled to a N-layer, an electrically conductive electrode formed on top of the P-layer, and an additional semiconductor structure, adjacent to the N-layer and which is electrically connected to a voltage bias source. The bias voltage applied to the additional semiconductor structure charges the additional semiconductor structure, thereby creating a tunneling effect between the N-layer and the P-layer, wherein electrons leave the N-layer and reach the P-layer and the electrically conductive layer. The electrons then migrate and distribute uniformly throughout the electrically conductive layer, which ensures a uniform bias voltage across to the entire photosensor array. The biasing scheme in this invention allows to achieve mass production of photosensors without the use of wire bonding.
    Type: Application
    Filed: February 25, 2009
    Publication date: June 25, 2009
    Applicant: PALO ALTO RESEARCH CENTER, INC.
    Inventors: JengPing Lu, James B. Boyce, Kathleen Dore Boyce
  • Publication number: 20090160006
    Abstract: A high fill-factor photosensor array is formed comprising a P-layer, an I-layer, one or more semiconductor structures adjacent to the I-layer and each coupled to a N-layer, an electrically conductive electrode formed on top of the P-layer, and an additional semiconductor structure, adjacent to the N-layer and which is electrically connected to a voltage bias source. The bias voltage applied to the additional semiconductor structure charges the additional semiconductor structure, thereby creating a tunneling effect between the N-layer and the P-layer, wherein electrons leave the N-layer and reach the P-layer and the electrically conductive layer. The electrons then migrate and distribute uniformly throughout the electrically conductive layer, which ensures a uniform bias voltage across to the entire photosensor array. The biasing scheme in this invention allows to achieve mass production of photosensors without the use of wire bonding.
    Type: Application
    Filed: February 25, 2009
    Publication date: June 25, 2009
    Applicant: Palo Alto Research Center, Inc.
    Inventors: JengPing Lu, James B. Boyce, Kathleen Dore Boyce
  • Patent number: 7338833
    Abstract: A structure and method for suppressing lateral leakage current in full fill factor image arrays includes dual dielectric passivation layer. A first passivation layer includes a material that is an insulator, has a low dielectric constant to minimize capacitive coupling between the contacts, and is low stress to prevent cracking. A second passivation layer includes a thin oxide or nitride layer over the first passivation layer.
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: March 4, 2008
    Assignee: Xerox Corporation
    Inventors: Jeng Ping Lu, Ping Mei, Francesco Lemmi, Robert A. Street, James B. Boyce
  • Patent number: 7227237
    Abstract: A high fill-factor photosensor array is formed comprising a P-layer, an I-layer, one or more semiconductor structures adjacent to the I-layer and each coupled to a N-layer, an electrically conductive electrode formed on top of the P-layer, and an additional semiconductor structure, adjacent to the N-layer and which is electrically connected to a voltage bias source. The bias voltage applied to the additional semiconductor structure charges the additional semiconductor structure, thereby creating a tunneling effect between the N-layer and the P-layer, wherein electrons leave the N-layer and reach the P-layer and the electrically conductive layer. The electrons then migrate and distribute uniformly throughout the electrically conductive layer, which ensures a uniform bias voltage across to the entire photosensor array. The biasing scheme in this invention allows to achieve mass production of photosensors without the use of wire bonding.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: June 5, 2007
    Assignee: Palo Alto Research Center Incorporated
    Inventors: JengPing Lu, Kathleen Dore Boyce, legal representative, James B. Boyce, deceased
  • Patent number: 6818535
    Abstract: An improved method and system for laser doping a semiconductor material is described. In the invention, phosphorous nitride is used as a dopant source. The phosphorous nitride is brought into close proximity with a region of the semiconductor to be doped. A pulse of laser light decomposes the phosphorous nitride and briefly melts the region of semiconductor to be doped to allow incorporation of dopant atoms from the phosphorous nitride into the semiconductor.
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: November 16, 2004
    Assignee: Xerox Corporation
    Inventors: Jeng Ping Lu, Ping Mei, James B. Boyce
  • Patent number: 6710370
    Abstract: An image sensor is disclosed including passivation walls extending above the pixel contact pads into a photosensor layer (e.g., amorphous silicon) such that the pixel contact pads are isolated to reduce cross-talk. The passivation walls are formed from SiO2 or SiON to further reduce cross-talk. An embodiment includes metal structures provided under interface regions (e.g., under the passivation walls) separating adjacent pixels that are negatively biased to prevent cross-talk, and optionally extend under the contact pad to increase pixel capacitance. One embodiment omits p-type dopant from the lower amorphous silicon photodiode layer, and additional photodiode material layers are disclosed. Another disclosed sensor structure utilizes a textured surface to increase light absorption. A color filter structure for image sensors is also disclosed.
    Type: Grant
    Filed: January 7, 2002
    Date of Patent: March 23, 2004
    Assignee: Xerox Corporation
    Inventors: Robert A. Street, James B. Boyce, John C. Knights
  • Publication number: 20030127647
    Abstract: An image sensor is disclosed including passivation walls extending above the pixel contact pads into a photosensor layer (e.g., amorphous silicon) such that the pixel contact pads are isolated to reduce cross-talk. The passivation walls are formed from SiO2 or SiON to further reduce cross-talk. An embodiment includes metal structures provided under interface regions (e.g., under the passivation walls) separating adjacent pixels that are negatively biased to prevent cross-talk, and optionally extend under the contact pad to increase pixel capacitance. One embodiment omits p-type dopant from the lower amorphous silicon photodiode layer, and additional photodiode material layers are disclosed. Another disclosed sensor structure utilizes a textured surface to increase light absorption. A color filter structure for image sensors is also disclosed.
    Type: Application
    Filed: January 7, 2002
    Publication date: July 10, 2003
    Inventors: Robert A. Street, James B. Boyce, John C. Knights
  • Patent number: 6586318
    Abstract: An improved method and system for laser doping a semiconductor material is described. In the invention, phosphorous nitride is used as a dopant source. The phosphorous nitride is brought into close proximity with a region of the semiconductor to be doped. A pulse of laser light decomposes the phosphorous nitride and briefly melts the region of semiconductor to be doped to allow incorporation of dopant atoms from the phosphorous nitride into the semiconductor.
    Type: Grant
    Filed: December 28, 1999
    Date of Patent: July 1, 2003
    Assignee: Xerox Corporation
    Inventors: Jeng Ping Lu, Ping Mei, James B. Boyce
  • Publication number: 20030067037
    Abstract: An improved method and system for laser doping a semiconductor material is described. In the invention, phosphorous nitride is used as a dopant source. The phosphorous nitride is brought into close proximity with a region of the semiconductor to be doped. A pulse of laser light decomposes the phosphorous nitride and briefly melts the region of semiconductor to be doped to allow incorporation of dopant atoms from the phosphorous nitride into the semiconductor.
    Type: Application
    Filed: October 28, 2002
    Publication date: April 10, 2003
    Applicant: Xerox Corporation
    Inventors: Jeng Ping Lu, Ping Mei, James B. Boyce
  • Publication number: 20020089026
    Abstract: A structure and method for suppressing lateral leakage current in full fill factor image arrays includes dual dielectric passivation layer. A first passivation layer includes a material that is an insulator, has a low dielectric constant to minimize capacitive coupling between the contacts, and is low stress to prevent cracking. A second passivation layer includes a thin oxide or nitride layer over the first passivation layer.
    Type: Application
    Filed: February 7, 2002
    Publication date: July 11, 2002
    Inventors: Jeng Ping Lu, Ping Mei, Francesco Lemmi, Robert A. Street, James B. Boyce
  • Patent number: 6384461
    Abstract: A structure and method for suppressing lateral leakage current in full fill factor image arrays includes dual dielectric passivation layer. A first passivation layer includes a material that is an insulator, has a low dielectric constant to minimize capacitive coupling between the contacts, and is low stress to prevent cracking. A second passivation layer includes a thin oxide or nitride layer over the first passivation layer.
    Type: Grant
    Filed: October 15, 1999
    Date of Patent: May 7, 2002
    Assignee: Xerox Corporation
    Inventors: Jeng Ping Lu, Ping Mei, Francesco Lemmi, Robert A. Street, James B. Boyce
  • Patent number: 6300648
    Abstract: A method and apparatus for reducing vertical leakage current in a high fill factor sensor array is described. Reduction of vertical leakage current is achieved by eliminating Schottky junction interfaces that occur between metal back contacts and intrinsic amorphous silicon layers. One method of eliminating the Schottky junction uses an extra wide region of N doped amorphous silicon to serve as a buffer between the metal back contact and the intrinsic amorphous silicon layer. Another method of eliminating the Schottky junction completely replaces the metal back contact and the N doped amorphous silicon layer with a substitute material such as N doped poly-silicon.
    Type: Grant
    Filed: December 28, 1999
    Date of Patent: October 9, 2001
    Assignee: Xerox Corporation
    Inventors: Ping Mei, Jeng Ping Lu, Francesco Lemmi, Robert A. Street, James B. Boyce
  • Patent number: 6288435
    Abstract: A method and apparatus for reducing vertical leakage current in a high fill factor sensor array is described. Reduction of vertical leakage current is achieved by eliminating Schottky junction interfaces that occur between metal back contacts and intrinsic amorphous silicon layers. One method of eliminating the Schottky junction uses an extra wide region of N doped amorphous silicon to serve as a buffer between the metal back contact and the intrinsic amorphous silicon layer. Another method of eliminating the Schottky junction completely replaces the metal back contact and the N doped amorphous silicon layer with a substitute material such as N doped poly-silicon.
    Type: Grant
    Filed: December 28, 1999
    Date of Patent: September 11, 2001
    Assignee: Xerox Corporation
    Inventors: Ping Mei, Jeng Ping Lu, Francesco Lemmi, Robert A. Street, James B. Boyce
  • Patent number: 6252215
    Abstract: A pixel circuit construction for image sensing includes a photosensor, an amplifier, a selector switch and, and a reset switch. The amplifier may be a single polycrystalline silicon (channel) transistor for high gain. The selector switch may also be a single polycrystalline silicon (channel) transistor for high conductivity. The reset switch may a single amorphous crystalline silicon (channel) transistor for low leakage current. The photosensor and amplifier may be connected to a shared bias line or may be connected to separate bias and drive lines, respectively. The selector and reset switches may be connected to a shared data line or may be connected to separate data and reset lines, respectively. Laser crystallization and rehydrogenation techniques are well suited to obtaining devices described herein. Gate line and drive voltage line synchronization is provided.
    Type: Grant
    Filed: April 28, 1998
    Date of Patent: June 26, 2001
    Assignee: Xerox Corporation
    Inventors: Ping Mei, Andrew J. Moore, Raj B. Apte, Steven E. Ready, Robert A. Street, James B. Boyce
  • Patent number: 6236831
    Abstract: A method and apparatus for recycling marking surfaces such as office paper is described. The system scans a marking surface, determines the location of printing on the marking surface and deposits erasing material directly over the printing. Because the distribution of erasing material is confined to the printed areas, the use of erasing material is minimized. The described system can be easily adapted for use in traditional copying systems to recycle paper.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: May 22, 2001
    Assignee: Xerox Corporation
    Inventors: Ping Mei, Jaan Noolandi, James B. Boyce