Abstract: A resistive element in an artificial neural network, the resistive element includes a Silicon-on-insulator (SOI) substrate, and a Silicon layer formed on the Silicon-on-insulator substrate. The Silicon layer includes dopants derived from a thin film dopant layer, and the thin film dopant layer includes a programmed amount of dopant including at least one of Boron and Phosphorus.

Abstract: A method of forming a resistive random access memory (RRAM) element, the method includes forming a Silicon layer on an oxide layer, depositing a thin film dopant layer on the Silicon layer, and controlling a concentration of the dopant in the thin film dopant layer.

Abstract: A resistive element in an electrochemical artificial neural network, includes a transition metal oxide thin film forming a working electrode, a pair of first electrodes connected to the working electrode, and a reference electrode for electrochemical doping of the working electrode. The biasing of the pair of first electrodes with respect to the reference electrode according to a determination of conductivity between the pair of first electrodes controls the resistance of the working electrode.

Abstract: A resistive element in an artificial neural network, the resistive element includes a Silicon-on-insulator (SOI) substrate, and a Silicon layer formed on the Silicon-on-insulator substrate. The Silicon layer includes dopants derived from a thin film dopant layer, and the thin film dopant layer includes a programmed amount of dopant including at least one of Boron and Phosphorus.

Abstract: A method of forming a resistive random access memory (RRAM) element, the method includes forming a Silicon layer on an oxide layer, depositing a thin film dopant layer on the Silicon layer, and controlling a concentration of the dopant in the thin film dopant layer.

Abstract: A method of forming semiconductor elements in an artificial neural network, the method including forming a substrate including an oxide layer, forming a Silicon layer on the oxide layer, depositing a thin film dopant layer on the Silicon layer, and controlling a concentration of the dopant in the thin film dopant layer.

Abstract: A resistive element in an electrochemical artificial neural network, includes a transition metal oxide thin film forming a working electrode, a pair of first electrodes connected to the working electrode, and a reference electrode for electrochemical doping of the working electrode. The biasing of the pair of first electrodes with respect to the reference electrode according to a determination of conductivity between the pair of first electrodes controls the resistance of the working electrode.

Abstract: A method of forming semiconductor elements in an artificial neural network, the method including forming a substrate including an oxide layer, forming a Silicon layer on the oxide layer, depositing a thin film dopant layer on the Silicon layer, and controlling a concentration of the dopant in the thin film dopant layer.

Abstract: Transistor devices having nanoscale material-based channels (e.g., carbon nanotube or graphene channels) and techniques for the fabrication thereof are provided. In one aspect, a transistor device is provided. The transistor device includes a substrate; an insulator on the substrate; a local bottom gate embedded in the insulator, wherein a top surface of the gate is substantially coplanar with a surface of the insulator; a local gate dielectric on the bottom gate; a carbon-based nanostructure material over at least a portion of the local gate dielectric, wherein a portion of the carbon-based nanostructure material serves as a channel of the device; and conductive source and drain contacts to one or more portions of the carbon-based nanostructure material on opposing sides of the channel that serve as source and drain regions of the device.

Abstract: Transistor devices having nanoscale material-based channels (e.g., carbon nanotube or graphene channels) and techniques for the fabrication thereof are provided. In one aspect, a transistor device is provided. The transistor device includes a substrate; an insulator on the substrate; a local bottom gate embedded in the insulator, wherein a top surface of the gate is substantially coplanar with a surface of the insulator; a local gate dielectric on the bottom gate; a carbon-based nanostructure material over at least a portion of the local gate dielectric, wherein a portion of the carbon-based nanostructure material serves as a channel of the device; and conductive source and drain contacts to one or more portions of the carbon-based nanostructure material on opposing sides of the channel that serve as source and drain regions of the device.

Abstract: The present invention provides a method for the selective placement of carbon nanotubes on a particular surface. In particular, the present invention provides a method in which self-assembled monolayers formed on an unpatterned or patterned metal oxide surface are used to attract or repel carbon nanotubes from a dispersion containing the same. In accordance with the present invention, the carbon nanotubes can be attracted to the self-assembled monolayers so as to be attached to the metal oxide surface, or they can be repelled by the self-assembled monolayers bonding to a predetermined surface other than the metal oxide surface containing the self-assembled monolayers.

Abstract: The present invention provides a method for the selective placement of carbon nanotubes on a particular surface. In particular, the present invention provides a method in which self-assembled monolayers formed on an unpatterned or patterned metal oxide surface are used to attract or repel carbon nanotubes from a dispersion containing the same. In accordance with the present invention, the carbon nanotubes can be attracted to the self-assembled monolayers so as to be attached to the metal oxide surface, or they can be repelled by the self-assembled monolayers bonding to a predetermined surface other than the metal oxide surface containing the self-assembled monolayers.

Abstract: The present invention provides a method for the selective placement of carbon nanotubes on a particular surface. In particular, the present invention provides a method in which self-assembled monolayers formed on an unpatterned or patterned metal oxide surface are used to attract or repel carbon nanotubes from a dispersion containing the same. In accordance with the present invention, the carbon nanotubes can be attracted to the self-assembled monolayers so as to be attached to the metal oxide surface, or they can be repelled by the self-assembled monolayers bonding to a predetermined surface other than the metal oxide surface containing the self-assembled monolayers.