Patents by Inventor James Brogle

James Brogle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250309016
    Abstract: A semiconductor device architecture includes a silicon substrate having sidewalls that are passivated by encapsulating the sidewalls in dielectric materials having high electric field strength. Encapsulating all the sidewalls using high field strength dielectric materials eliminates electrical paths in air or vacuum and confines the electric fields in these high field strength materials, increasing the breakdown voltage relative to unencapsulated devices and allowing the device to withstand greater standoff voltages. In some cases, encapsulating the sidewalls in this manner can allow the device to withstand voltages of 500V or greater.
    Type: Application
    Filed: May 16, 2025
    Publication date: October 2, 2025
    Inventors: Timothy Boles, David Hoag, Luis Baez, Margaret Barter, James Brogle
  • Patent number: 12315770
    Abstract: A semiconductor device architecture includes a silicon substrate having sidewalls that are passivated by encapsulating the sidewalls in dielectric materials having high electric field strength. Encapsulating all the sidewalls using high field strength dielectric materials eliminates electrical paths in air or vacuum and confines the electric fields in these high field strength materials, increasing the breakdown voltage relative to unencapsulated devices and allowing the device to withstand greater standoff voltages. In some cases, encapsulating the sidewalls in this manner can allow the device to withstand voltages of 500V or greater.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: May 27, 2025
    Assignee: MACOM Technology Solutions Holdings, Inc.
    Inventors: Timothy Boles, David Hoag, Luis Baez, Margaret Barter, James Brogle
  • Patent number: 12052049
    Abstract: A transmit-received (TR) switch is designed such that the receiver-side shunt PIN diode acts as a switchable shunt diode while the switch operates in transmit mode and acts as a limiter while the switch operates in receive mode. This is achieved using a DC Schottky diode between the receiver-side shunt network and the biasing network. While the switch operates in receive mode, received radio frequency (RF) signals that exceed a power threshold cause the Schottky diode to become forward biased, causing the shunt PIN diode to act as a limiter that protects the receiver from excessively high RF signal power. This approach affords a high level of protection using a small number of components and without adding insertion loss to the RF signal path.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: July 30, 2024
    Assignee: MACOM Technology Solutions Holdings, Inc.
    Inventors: James Brogle, Jean-Marc Mourant
  • Publication number: 20230008159
    Abstract: A transmit-received (TR) switch is designed such that the receiver-side shunt PIN diode acts as a switchable shunt diode while the switch operates in transmit mode and acts as a limiter while the switch operates in receive mode. This is achieved using a DC Schottky diode between the receiver-side shunt network and the biasing network. While the switch operates in receive mode, received radio frequency (RF) signals that exceed a power threshold cause the Schottky diode to become forward biased, causing the shunt PIN diode to act as a limiter that protects the receiver from excessively high RF signal power. This approach affords a high level of protection using a small number of components and without adding insertion loss to the RF signal path.
    Type: Application
    Filed: July 8, 2021
    Publication date: January 12, 2023
    Inventors: James Brogle, Jean-Marc Mourant
  • Publication number: 20220367303
    Abstract: A semiconductor device architecture includes a silicon substrate having sidewalls that are passivated by encapsulating the sidewalls in dielectric materials having high electric field strength. Encapsulating all the sidewalls using high field strength dielectric materials eliminates electrical paths in air or vacuum and confines the electric fields in these high field strength materials, increasing the breakdown voltage relative to unencapsulated devices and allowing the device to withstand greater standoff voltages. In some cases, encapsulating the sidewalls in this manner can allow the device to withstand voltages of 500V or greater.
    Type: Application
    Filed: April 19, 2022
    Publication date: November 17, 2022
    Inventors: Timothy Boles, David Hoag, Luis Baez, Margaret Barter, James Brogle
  • Patent number: 9917579
    Abstract: A switching circuit includes a first diode coupled between a first terminal and a second terminal, a second diode coupled between the first terminal and a third terminal, and a bias circuit coupled to the first terminal and configured to bias the first diode on and the second diode off in a first switch state and to bias the first diode off and the second diode on in a second switch state, the bias circuit including a voltage converter configured to convert a fixed voltage to an intermediate voltage and a current source coupled in series with the voltage converter.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: March 13, 2018
    Assignee: MACOM Technology Solutions Holdings, Inc.
    Inventors: Brendan Foley, David Ryan, James Brogle
  • Publication number: 20180013425
    Abstract: A switching circuit includes a first diode coupled between a first terminal and a second terminal, a second diode coupled between the first terminal and a third terminal, and a bias circuit coupled to the first terminal and configured to bias the first diode on and the second diode off in a first switch state and to bias the first diode off and the second diode on in a second switch state, the bias circuit including a voltage converter configured to convert a fixed voltage to an intermediate voltage and a current source coupled in series with the voltage converter.
    Type: Application
    Filed: July 6, 2016
    Publication date: January 11, 2018
    Inventors: Brendan Foley, David Ryan, James Brogle
  • Publication number: 20050269695
    Abstract: A chip-scale package and method of manufacturing a chip-scale package are provided. The chip-scale package includes a mounting portion defined by a plurality of metal layers formed on each of a plurality of semiconductor regions for mounting a device thereto. The mounting portions are formed on a first side of the plurality of semiconductor regions. The chip-scale package further includes a backside metal surface formed on each of a second side of the plurality of semiconductor regions, with the plurality of semiconductor regions providing electrical connection between the mounting portions and the backside metal surfaces.
    Type: Application
    Filed: June 7, 2004
    Publication date: December 8, 2005
    Inventors: James Brogle, Timothy Boles, Joel Goodrich
  • Publication number: 20050006729
    Abstract: A heterojunction P—I—N diode switch comprises a first layer of doped semiconductor material of a first doping type, a second layer of doped semiconductor material of a second doping type and a substrate on which is disposed the first and second layers. An intrinsic layer of semiconductor material is disposed between the first layer and second layer. The semiconductor material composition of at least one of the first layer and second layer is sufficiently different from that of the intrinsic layer so as to form a heterojunction therebetween, creating an energy barrier in which injected carriers from the junction are confined by the barrier, effectively reducing the series resistance within the I region of the P—I—N diode and the insertion loss relative to that of homojunction P—I—N diodes.
    Type: Application
    Filed: August 10, 2004
    Publication date: January 13, 2005
    Inventors: David Hoag, Timothy Boles, James Brogle