Patents by Inventor James C. Mazurowski

James C. Mazurowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5600805
    Abstract: Enables any OS of plural OSs within any of plural logical-resource partitions (LPARs) of a CEC to use interpretive execution for synchronously-executable CHSC (channel subsystem call) commands. A CHSC command authorization mask (CCAM) is provided to control which CHSC commands are allowed to execute interpretively (with pass-through), and which commands are executed with hypervisor intervention (as all prior CHSC commands did). By enabling interpretive execution of those commands which can successfully operate with pass-through, significant system efficiency is obtained. And by disabling interpretive execution for a subset of CHSC commands (which are not allowed to execute with pass-through) potential system failures may be prevented. Thus, interpretive execution may be restricted differently among the OSs in a CEC. Novel CHSC command execution now handles multiple images of shared I/O resources by use of image identifiers, which could not be done before.
    Type: Grant
    Filed: June 15, 1992
    Date of Patent: February 4, 1997
    Assignee: International Business Machines Corporation
    Inventors: Kenneth J. Fredericks, Robert E. Galbraith, Richard R. Guyette, Marten J. Halma, Roger E. Hough, Suzanne M. John, James C. Mazurowski, Kenneth J. Oakes, Leslie W. Wyman
  • Patent number: 5452455
    Abstract: This invention involves reconfiguration support for shared I/O resources in a a computer electronic complex (CEC) supporting both shared and unshared I/O channels of the type described and claimed in U.S. patent application Ser. No. 07/898,867 (PO9-92-016) filed on the same day as the subject application and assigned to the same assignee as the subject application. Prior channel subsystem call (CHSC) instructions cannot execute when a channel is to be configured as shareable by plural operating systems in a CEC.
    Type: Grant
    Filed: June 15, 1992
    Date of Patent: September 19, 1995
    Assignee: International Business Machines Corporation
    Inventors: Miriam P. Brown, Richard Cwiakala, Kenneth J. Fredericks, Marten J. Halma, David W. Hollar, Roger E. Hough, Suzanne M. John, Assaf Marron, James C. Mazurowski, Kenneth J. Oakes, Charles E. Shapley, Leslie W. Wyman
  • Patent number: 5222215
    Abstract: A CPU interface recognizing a large very number of I/O interruption queues in a logically partitioned data processing system. Different partitions may contain different guest operating systems. The CPU interface controls how plural CPUs respond to I/O interruptions put on numerous hardware-controlled queues. A host hypervisor program dispatches the guest operating systems. The guests use the I/O interruptions in controlling the dispatching of their programs on the CPUs in a system. The invention allows the number of guest partitions in the system to exceed the number of I/O interruption subclasses (ISCs) architected in the system, and enables the dispatching controls of each guest operating system to be sensitive to different priorities for plural programs operating under a respective guest. The invention provides CPU controls that support alerting the host to enabled I/O interruptions, and provides CPU controlled pass-through for enabling direct guest handling of the guests I/O interruptions.
    Type: Grant
    Filed: August 29, 1991
    Date of Patent: June 22, 1993
    Assignee: International Business Machines Corporation
    Inventors: Norman C. Chou, Peter H. Gum, Roger E. Hough, Moon J. Kim, James C. Mazurowski, Donald W. McCauley, Casper A. Scalzi, John F. Scanlon, Leslie W. Wyman