Abstract: Described herein are systems, methods, and other techniques for identifying redundant parameters and reducing parameters for testing a device. A set of test values and limits for a set of parameters are received. A set of simulated test values for the set of parameters are determined based on one or more probabilistic representations for the set of parameters. The one or more probabilistic representations are constructed based on the set of test values. A set of cumulative probabilities of passing for the set of parameters are calculated based on the set of simulated test values and the limits. A reduced set of parameters are determined from the set of parameters based on the set of cumulative probabilities of passing. The reduced set of parameters are deployed for testing the device.

Abstract: Described herein are systems, methods, and other techniques for identifying redundant parameters and reducing parameters for testing a device. A set of test values and limits for a set of parameters are received. A set of simulated test values for the set of parameters are determined based on one or more probabilistic representations for the set of parameters. The one or more probabilistic representations are constructed based on the set of test values. A set of cumulative probabilities of passing for the set of parameters are calculated based on the set of simulated test values and the limits. A reduced set of parameters are determined from the set of parameters based on the set of cumulative probabilities of passing. The reduced set of parameters are deployed for testing the device.

Abstract: System and method for machine condition monitoring using phase adjusted vector averaging. An analog signal from a sensor measuring a machine parameter may be acquired, thereby generating a first digital signal that includes multiple analysis blocks of data. For each analysis block, a complex valued frequency spectrum (CVFS) may be computed via a Discrete Fourier transform (DFT), at least one reference frequency may be specified, and a complex valued phase compensation vector that preserves magnitude while adjusting phase constructed to achieve coherence between reference frequency components (RFCs) and the selected analysis block. The CVFS may be phase compensated by multiplying the complex valued phase compensation vector with the complex-valued frequency spectrum. The complex valued frequency spectra of the analysis blocks may be vector averaged, thereby improving signal to noise ratio at specified frequencies.

Abstract: System and method for configuring a system of heterogeneous hardware components, including at least one: programmable hardware element (PHE), digital signal processor (DSP) core, and programmable communication element (PCE). A program, e.g., a graphical program (GP), which includes floating point math functionality and which is targeted for distributed deployment on the system is created. Respective portions of the program for deployment to respective ones of the hardware components are automatically determined. Program code implementing communication functionality between the at least one PHE and the at least one DSP core and targeted for deployment to the at least one PCE is automatically generated. At least one hardware configuration program (HCP) is generated from the program and the code, including compiling the respective portions of the program and the program code for deployment to respective hardware components. The HCP is deployable to the system for concurrent execution of the program.

Abstract: Techniques relating to LDPC encoding. A set of operations is produced that is usable to generate an encoded message based on an input message. The set of operations corresponds to operations for entries in a smaller matrix representation that specifies locations of non-zero entries in an LDPC encoding matrix. A mobile device is configured with the set of operations to perform LDPC encoding. Circuitry configured with the set of operations performs LDPC encoding with high performance, relatively small area and/or low power consumption.

Abstract: Global optimization and verification of cyber-physical systems using graphical floating point math functionality on a heterogeneous hardware system (HHS). A program includes floating point implementations of a control program (CP), model of a physical system (MPS), objective function, requirements verification program (RVP), and/or global optimizer. A simulation simulates HHS implementation of the program using co-simulation with a trusted model, including simulating behavior and timing of distributed execution of the program on the HHS, and may verify the HHS implementation using the RVP. The HHS is configured to execute the CP and MPS concurrently in a distributed manner. After deploying the program to the HHS, the HHS is configured to globally optimize (improve) the CP and MPS executing concurrently on the HHS via the global optimizer. The optimized MPS may be usable to construct the physical system. The optimized CP may be executable on the HHS to control the physical system.

Abstract: Techniques are disclosed relating to LDPC encoding. In some embodiments, a set of operations is produced that is usable to generate an encoded message based on an input message. In some embodiments, the set of operations correspond to operations for entries in a smaller matrix representation that specifies locations of non-zero entries in an LDPC encoding matrix. In some embodiments, a mobile device is configured with the set of operations to perform LDPC encoding. Circuitry configured with the set of operations may perform LDPC encoding with high performance, relatively small area and/or low power consumption, in some embodiments.

Abstract: System and method for machine condition monitoring using phase adjusted vector averaging. An analog signal from a sensor measuring a machine parameter may be acquired, thereby generating a first digital signal that includes multiple analysis blocks of data. For each analysis block, a complex valued frequency spectrum (CVFS) may be computed via a Discrete Fourier transform (DFT), at least one reference frequency may be specified, and a complex valued phase compensation vector that preserves magnitude while adjusting phase constructed to achieve coherence between reference frequency components (RFCs) and the selected analysis block. The CVFS may be phase compensated by multiplying the complex valued phase compensation vector with the complex-valued frequency spectrum. The complex valued frequency spectra of the analysis blocks may be vector averaged, thereby improving signal to noise ratio at specified frequencies.

Abstract: Global optimization and verification of cyber-physical systems using graphical floating point math functionality on a heterogeneous hardware system (HHS). A program includes floating point implementations of a control program (CP), model of a physical system (MPS), objective function, requirements verification program (RVP), and/or global optimizer. A simulation simulates HHS implementation of the program using co-simulation with a trusted model, including simulating behavior and timing of distributed execution of the program on the HHS, and may verify the HHS implementation using the RVP. The HHS is configured to execute the CP and MPS concurrently in a distributed manner. After deploying the program to the HHS, the HHS is configured to globally optimize (improve) the CP and MPS executing concurrently on the HHS via the global optimizer. The optimized MPS may be usable to construct the physical system. The optimized CP may be executable on the HHS to control the physical system.

Abstract: System and method for configuring a system of heterogeneous hardware components, including at least one: programmable hardware element (PHE), digital signal processor (DSP) core, and programmable communication element (PCE). A program, e.g., a graphical program (GP), which includes floating point math functionality and which is targeted for distributed deployment on the system is created. Respective portions of the program for deployment to respective ones of the hardware components are automatically determined. Program code implementing communication functionality between the at least one PHE and the at least one DSP core and targeted for deployment to the at least one PCE is automatically generated. At least one hardware configuration program (HCP) is generated from the program and the code, including compiling the respective portions of the program and the program code for deployment to respective hardware components. The HCP is deployable to the system for concurrent execution of the program.

Abstract: System and method for configuring a system of heterogeneous hardware components, including at least one: programmable hardware element (PHE), digital signal processor (DSP) core, and programmable communication element (PCE). A program, e.g., a graphical program (GP), which includes floating point math functionality and which is targeted for distributed deployment on the system is created. Respective portions of the program for deployment to respective ones of the hardware components are automatically determined. Program code implementing communication functionality between the at least one PHE and the at least one DSP core and targeted for deployment to the at least one PCE is automatically generated. At least one hardware configuration program (HCP) is generated from the program and the code, including compiling the respective portions of the program and the program code for deployment to respective hardware components. The HCP is deployable to the system for concurrent execution of the program.

Abstract: Performing sequencing of a polynucleotide. A first image of microparticles that are distributed in a random fashion on a substrate may be received. Each of the microparticles may include a plurality of similar oligonucleotides of the polynucleotide. A second image of the microparticles may be received. A plurality of first subportions of the first image may be determined. Each subportion may include a respective plurality of microparticles distributed in a random fashion. The second image may be analyzed to identify a plurality of second subportions in the second image. Each of the plurality of second subportions may correspond to a respective one of the plurality of first subportions. A plurality of the microparticles may be matched from the first and second images based on said analyzing. At least a portion of the sequence of nucleotides of the polynucleotide may be determined based on said matching.

Abstract: System and method for configuring a system of heterogeneous hardware components, including at least one: programmable hardware element (PHE), digital signal processor (DSP) core, and programmable communication element (PCE). A program, e.g., a graphical program (GP), which includes floating point math functionality and which is targeted for distributed deployment on the system is created. Respective portions of the program for deployment to respective ones of the hardware components are automatically determined. Program code implementing communication functionality between the at least one PHE and the at least one DSP core and targeted for deployment to the at least one PCE is automatically generated. At least one hardware configuration program (HCP) is generated from the program and the code, including compiling the respective portions of the program and the program code for deployment to respective hardware components. The HCP is deployable to the system for concurrent execution of the program.

Abstract: System and method for configuring a system of heterogeneous hardware components, including at least one: programmable hardware element (PHE), digital signal processor (DSP) core, and programmable communication element (PCE). A program, e.g., a graphical program (GP), which includes floating point math functionality and which is targeted for distributed deployment on the system is created. Respective portions of the program for deployment to respective ones of the hardware components are automatically determined. Program code implementing communication functionality between the at least one PHE and the at least one DSP core and targeted for deployment to the at least one PCE is automatically generated. At least one hardware configuration program (HCP) is generated from the program and the code, including compiling the respective portions of the program and the program code for deployment to respective hardware components. The HCP is deployable to the system for concurrent execution of the program.

Abstract: Performing sequencing of a polynucleotide. A first image of microparticles that are distributed in a random fashion on a substrate may be received. Each of the microparticles may include a plurality of similar oligonucleotides of the polynucleotide. A second image of the microparticles may be received. A plurality of first subportions of the first image may be determined. Each subportion may include a respective plurality of microparticles distributed in a random fashion. The second image may be analyzed to identify a plurality of second subportions in the second image. Each of the plurality of second subportions may correspond to a respective one of the plurality of first subportions. A plurality of the microparticles may be matched from the first and second images based on said analyzing. At least a portion of the sequence of nucleotides of the polynucleotide may be determined based on said matching.

Abstract: System and method for approximating a system. A multi-parameter representation of a family of systems is stored. An embedding of the family into an abstract geometrical continuous space with a metric and defined by the parameters is determined. Coordinates of the space specify values for the parameters of systems of the family. The space includes a grid of points representing respective discrete approximations of the systems. A first point corresponding to a desired instance of a system is determined. The first point's coordinates specify values for the parameters of the instance. The space is sampled using a mapping of a well-distributed point set from a Euclidean space of the parameters to the abstract space. A nearest discrete point to the first point is determined which specifies values for parameters for an optimal discrete approximation of the desired instance, which are useable to implement the discrete approximation of the desired instance.

Abstract: System and method for approximating a system. A multi-parameter representation of a family of systems is stored. An embedding of the family into an abstract geometrical continuous space with a metric and defined by the parameters is determined. Coordinates of the space specify values for the parameters of systems of the family. The space includes a grid of points representing respective discrete approximations of the systems. A first point corresponding to a desired instance of a system is determined. The first point's coordinates specify values for the parameters of the instance. The space is sampled using a mapping of a well-distributed point set from a Euclidean space of the parameters to the abstract space. A nearest discrete point to the first point is determined which specifies values for parameters for an optimal discrete approximation of the desired instance, which are useable to implement the discrete approximation of the desired instance.