Patents by Inventor James Chlipala

James Chlipala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of making a semiconductor device by balancing shallow trench isolation stress and optical proximity effects
    Publication number: 20060107243
    Abstract: The present invention provides a method for manufacturing a semiconductor device, comprising: determining an isolation structure stress effect of a first semiconductor device, determining an optical proximity effect of a second semiconductor device, selecting a modeling design parameter such that the isolation structure stress effect is offset against the optical proximity effect on a fabrication model, and using the selected design parameter to construct a third semiconductor device.
    Type: Application
    Filed: November 18, 2004
    Publication date: May 18, 2006
    Applicant: Agere Systems Inc.
    Inventors: James Chlipala, Shahriar Moinian
  • Crosstalk reduction in a backplane employing low-skew clock distribution
    Publication number: 20050088958
    Abstract: A system for a backplane that employs i) an adjustment of positive-to-negative (P-N) driver skew of a transmit signal of a relatively high-speed differential driver to reduce far-end crosstalk, ii) a high-speed differential subtraction circuit combining a gain-adjusted replica of at least one transmit signal with a received signal to reduce near-end crosstalk, and iii) a phase-locked loop (PLL) synchronization circuit to align timing events between a set of near-end and far-end high-speed interfaces.
    Type: Application
    Filed: February 18, 2004
    Publication date: April 28, 2005
    Inventors: Christopher Abel, Joseph Anidjar, James Chlipala, Abhishek Duggal, Donald Laturell