Patents by Inventor James Curtis Stout

James Curtis Stout has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for fetching instructions from the memory subsystem of a mixed architecture processor into a hardware emulation engine
    Patent number: 7356674
    Abstract: A method of, and apparatus for, interfacing the hardware of a processor capable of processing instructions from more than one type of instruction set. More particularly, an engine responsible for fetching native instructions from a memory subsystem (such as an EM fetch engine) is interfaced with an engine that processes emulated instructions (such as an x86 engine). This is achieved using a handshake protocol, whereby the x86 engine sends an explicit fetch request signal to the EM fetch engine along with a fetch address. The EM fetch engine then accesses the memory subsystem and retrieves a line of instructions for subsequent decode and execution. The EM fetch engine sends this line of instructions to the x86 engine along with an explicit fetch complete signal. The EM fetch engine also includes a fetch address queue capable of holding the fetch addresses before they are processed by the EM fetch engine. The fetch requests are processed such that more than one fetch request may be pending at the same time.
    Type: Grant
    Filed: November 21, 2003
    Date of Patent: April 8, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Anuj Dua, James E McCormick, Jr., Stephen R. Undy, Barry J Arnold, Russell C Brockmann, David Carl Kubicek, James Curtis Stout
  • Method and apparatus for fetching instructions from the memory subsystem of a mixed architecture processor into a hardware emulation engine
    Publication number: 20040107335
    Abstract: A method of, and apparatus for, interfacing the hardware of a processor capable of processing instructions from more than one type of instruction set. More particularly, an engine responsible for fetching native instructions from a memory subsystem (such as an EM fetch engine) is interfaced with an engine that processes emulated instructions (such as an x86 engine). This is achieved using a handshake protocol, whereby the x86 engine sends an explicit fetch request signal to the EM fetch engine along with a fetch address. The EM fetch engine then accesses the memory subsystem and retrieves a line of instructions for subsequent decode and execution. The EM fetch engine sends this line of instructions to the x86 engine along with an explicit fetch complete signal. The EM fetch engine also includes a fetch address queue capable of holding the fetch addresses before they are processed by the EM fetch engine. The fetch requests are processed such that more than one fetch request may be pending at the same time.
    Type: Application
    Filed: November 21, 2003
    Publication date: June 3, 2004
    Inventors: Anuj Dua, James E. McCormick, Stephen R. Undy, Barry J. Arnold, Russell C. Brockmann, David Carl Kubicek, James Curtis Stout
  • Method and apparatus for fetching instructions from the memory subsystem of a mixed architecture processor into a hardware emulation engine
    Patent number: 6678817
    Abstract: A method of, and apparatus for, interfacing the hardware of a processor capable of processing instructions from more than one type of instruction set. More particularly, an engine responsible for fetching native instructions from a memory subsystem (such as an EM fetch engine) is interfaced with an engine that processes emulated instructions (such as an x86 engine). This is achieved using a handshake protocol, whereby the x86 engine sends an explicit fetch request signal to the EM fetch engine along with a fetch address. The EM fetch engine then accesses the memory subsystem and retrieves a line of instructions for subsequent decode and execution. The EM fetch engine sends this line of instructions to the x86 engine along with an explicit fetch complete signal. The EM fetch engine also includes a fetch address queue capable of holding the fetch addresses before they are processed by the EM fetch engine. The fetch requests are processed such that more than one fetch request may be pending at the same time.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: January 13, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Anuj Dua, James E McCormick, Jr., Stephen R. Undy, Barry J Arnold, Russell C Brockmann, David Carl Kubicek, James Curtis Stout