Patents by Inventor James D. Ballew
James D. Ballew has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10769088Abstract: A High Performance Computing (HPC) node comprises a motherboard, a switch comprising eight or more ports integrated on the motherboard, and at least two processors operable to execute an HPC job, with each processor communicably coupled to the integrated switch and integrated on the motherboard.Type: GrantFiled: April 1, 2019Date of Patent: September 8, 2020Assignee: Raytheon CompanyInventors: James D. Ballew, Gary R. Early
-
Publication number: 20190294576Abstract: A High Performance Computing (HPC) node comprises a motherboard, a switch comprising eight or more ports integrated on the motherboard, and at least two processors operable to execute an HPC job, with each processor communicably coupled to the integrated switch and integrated on the motherboard.Type: ApplicationFiled: April 1, 2019Publication date: September 26, 2019Inventors: James D. Ballew, Gary R. Early
-
Patent number: 10289586Abstract: A High Performance Computing (HPC) node comprises a motherboard, a switch comprising eight or more ports integrated on the motherboard, and at least two processors operable to execute an HPC job, with each processor communicably coupled to the integrated switch and integrated on the motherboard.Type: GrantFiled: April 9, 2015Date of Patent: May 14, 2019Assignee: Raytheon CompanyInventors: James D. Ballew, Gary R. Early
-
Patent number: 9832077Abstract: Cluster management software comprises a plurality of cluster agents, with each cluster agent associated with an HPC node including an integrated fabric and the cluster agent operable to determine a status of the associated HPC node. The software further includes a cluster management engine communicably coupled with the plurality of the HPC nodes and operable to execute an HPC job using a dynamically allocated subset of the plurality of HPC nodes based on the determined status of the plurality of HPC nodes.Type: GrantFiled: November 2, 2015Date of Patent: November 28, 2017Assignee: Raytheon CompanyInventors: James D. Ballew, Shannon V. Davidson, Anthony N. Richoux
-
Publication number: 20160057016Abstract: Cluster management software comprises a plurality of cluster agents, with each cluster agent associated with an HPC node including an integrated fabric and the cluster agent operable to determine a status of the associated HPC node. The software further includes a cluster management engine communicably coupled with the plurality of the HPC nodes and operable to execute an HPC job using a dynamically allocated subset of the plurality of HPC nodes based on the determined status of the plurality of HPC nodes.Type: ApplicationFiled: November 2, 2015Publication date: February 25, 2016Inventors: James D. Ballew, Gary R. Early, Shannon V. Davidson
-
Patent number: 9178784Abstract: Cluster management software comprises a plurality of cluster agents, with each cluster agent associated with an HPC node including an integrated fabric and the cluster agent operable to determine a status of the associated HPC node. The software further includes a cluster management engine communicably coupled with the plurality of the HPC nodes and operable to execute an HPC job using a dynamically allocated subset of the plurality of HPC nodes based on the determined status of the plurality of HPC nodes.Type: GrantFiled: April 15, 2004Date of Patent: November 3, 2015Assignee: Raytheon CompanyInventors: James D. Ballew, Shannon V. Davidson, Anthony N. Richoux
-
Publication number: 20150212964Abstract: A High Performance Computing (HPC) node comprises a motherboard, a switch comprising eight or more ports integrated on the motherboard, and at least two processors operable to execute an HPC job, with each processor communicably coupled to the integrated switch and integrated on the motherboard.Type: ApplicationFiled: April 9, 2015Publication date: July 30, 2015Inventors: James D. Ballew, Gary R. Early
-
Patent number: 9037833Abstract: A High Performance Computing (HPC) node comprises a motherboard, a switch comprising eight or more ports integrated on the motherboard, and at least two processors operable to execute an HPC job, with each processor communicably coupled to the integrated switch and integrated on the motherboard.Type: GrantFiled: December 12, 2012Date of Patent: May 19, 2015Assignee: RAYTHEON COMPANYInventors: James D. Ballew, Gary R. Early
-
Patent number: 8335909Abstract: A High Performance Computing (HPC) node comprises a motherboard, a switch comprising eight or more ports integrated on the motherboard, and at least two processors operable to execute an HPC job, with each processor communicably coupled to the integrated switch and integrated on the motherboard.Type: GrantFiled: April 15, 2004Date of Patent: December 18, 2012Assignee: Raytheon CompanyInventors: James D. Ballew, Gary R. Early
-
Patent number: 8160061Abstract: In one embodiment, a computer cluster network includes at least three switches communicatively coupled to respective at least one client nodes. At least one of the at least three switches communicatively couples together at least two other ones of the plurality of switches. In a method embodiment, a method of networking client nodes includes communicatively coupling each switch of at least three switches to respective at least one client nodes. The method also includes communicatively coupling together at least two switches of the at least three switches through at least one other switch of the at least three switches.Type: GrantFiled: December 29, 2006Date of Patent: April 17, 2012Assignee: Raytheon CompanyInventor: James D. Ballew
-
Patent number: 8144697Abstract: In certain embodiments, a method for networking a computer cluster includes communicatively coupling together each of a plurality of client nodes through one or more switches, each switch comprising a plurality of switch ports. The method also includes positioning at least two of the one or more switches inside a switch package. In addition, the method includes electrically interconnecting at least a subset of the plurality of switch ports of the at least two of the one or more switches within the switch package.Type: GrantFiled: January 12, 2007Date of Patent: March 27, 2012Assignee: Raytheon CompanyInventors: James D. Ballew, Shannon V. Davidson
-
Patent number: 8145837Abstract: According to one embodiment, a computer storage system includes one or more redundant storage servers coupled to one or more cache servers. A redundant storage server is coupled to each disk server. A disk server comprises at least one mass storage disk operable to store data. The data is segmented according to logical blocks, where each logical block has an associated logical block identifier. The redundant storage servers are operable to replicate each logical block of at least two of the disk servers. The cache servers comprise a cache memory and are coupled to each redundant storage server. Each cache server is operable to access the replicated logical blocks according to the associated logical block identifiers, and cache, in the cache memory, the replicated logical block according to the associated logical block identifier.Type: GrantFiled: January 3, 2008Date of Patent: March 27, 2012Assignee: Raytheon CompanyInventors: James D. Ballew, Shannon V. Davidson
-
Patent number: 7711977Abstract: A method for managing HPC node failure includes determining that one of a plurality of HPC nodes has failed, with each HPC node comprising an integrated fabric. The failed node is then removed from a virtual list of HPC nodes, with the virtual list comprising one logical entry for each of the plurality of HPC nodes.Type: GrantFiled: April 15, 2004Date of Patent: May 4, 2010Assignee: Raytheon CompanyInventors: James D. Ballew, Shannon V. Davidson
-
Publication number: 20080201549Abstract: According to one embodiment of the present invention, a method for storing data includes partitioning the data into a plurality of sections and storing the sections on one or more server nodes of a plurality of server nodes. The method further includes caching one or more sections of the plurality of sections of data onto one or more caches nodes of a plurality of cache nodes. The method further includes storing, for each section of data, the identity of the particular cache node on which the section of data is cached.Type: ApplicationFiled: February 20, 2007Publication date: August 21, 2008Applicant: Raytheon CompanyInventors: Shannon V. Davidson, James D. Ballew
-
Publication number: 20080170581Abstract: In certain embodiments, a method for networking a computer cluster includes communicatively coupling together each of a plurality of client nodes through one or more switches, each switch comprising a plurality of switch ports. The method also includes positioning at least two of the one or more switches inside a switch package. In addition, the method includes electrically interconnecting at least a subset of the plurality of switch ports of the at least two of the one or more switches within the switch package.Type: ApplicationFiled: January 12, 2007Publication date: July 17, 2008Applicant: Raytheon CompanyInventors: Shannon V. Davidson, James D. Ballew
-
Publication number: 20080168221Abstract: According to one embodiment, a computer storage system includes one or more redundant storage servers coupled to one or more cache servers. A redundant storage server is coupled to each disk server. A disk server comprises at least one mass storage disk operable to store data. The data is segmented according to logical blocks, where each logical block has an associated logical block identifier. The redundant storage servers are operable to replicate each logical block of at least two of the disk servers. The cache servers comprise a cache memory and are coupled to each redundant storage server. Each cache server is operable to access the replicated logical blocks according to the associated logical block identifiers, and cache, in the cache memory, the replicated logical block according to the associated logical block identifier.Type: ApplicationFiled: January 3, 2008Publication date: July 10, 2008Applicant: Raytheon CompanyInventors: James D. Ballew, Shannon V. Davidson
-
Publication number: 20080162732Abstract: In one embodiment, a computer cluster network includes at least three switches communicatively coupled to respective at least one client nodes. At least one of the at least three switches communicatively couples together at least two other ones of the plurality of switches. In a method embodiment, a method of networking client nodes includes communicatively coupling each switch of at least three switches to respective at least one client nodes. The method also includes communicatively coupling together at least two switches of the at least three switches through at least one other switch of the at least three switches.Type: ApplicationFiled: December 29, 2006Publication date: July 3, 2008Applicant: Raytheon CompanyInventor: James D. Ballew
-
Publication number: 20080101395Abstract: In a method embodiment, a method for networking a computer cluster system includes communicatively coupling a plurality of network nodes of respective ones of a plurality of sub-arrays, each network node operable to route, send, and receive messages. The method also includes communicatively coupling at least two of the plurality of sub-arrays through at least one core switch.Type: ApplicationFiled: October 30, 2006Publication date: May 1, 2008Applicant: Raytheon CompanyInventor: James D. Ballew
-
Patent number: 4577272Abstract: Incoming data messages to a system having a plurality of channels are assigned for processing to one of the channels to share the processing load more or less equally among all the channels of the system. Each channel receives messages by means of a communications link for processing. Included in each channel is a disk drive for a storage medium, a disk controller and peripheral controllers for input/output equipment as required. Each channel of the system also includes a data processor. A message is received from the communication link of any of the channels, which message is identified by the data processor of that channel. The processor then evaluates the number of messages waiting to be processed in each of the other channels for assignment to a channel having the least number of messages on the processing list. The processor considers only on-line channels in this assignment selection.Type: GrantFiled: June 27, 1983Date of Patent: March 18, 1986Assignee: E-Systems, Inc.Inventors: James D. Ballew, Phil H. Rogers