Patents by Inventor James D. Greenfield
James D. Greenfield has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7936814Abstract: Plural encoders operating in parallel to achieve a desired data rate have their respective outputs combined by an autonomously operating arrangement for transfer of data to a direct memory access arrangement from respective encoders in order in response to a signal asserted upon completion of encoding and output of encoded data corresponding to a predetermined portion of input data. Buffering of encoder output can be either internal or external to the encoders. Zero bytes which may be inherently generated at the beginning and end of an encoder output stream may be suppressed to improve encoded signal quality and efficiency.Type: GrantFiled: March 28, 2002Date of Patent: May 3, 2011Assignee: International Business Machines CorporationInventors: James D. Greenfield, Barbara A. Hall, Agnes Y. Ngai, Edward F. Westermann
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Patent number: 6980598Abstract: A technique is provided for programmably vertically filtering pixel values of frames of a sequence of video frames. The technique includes separating luminance components and chrominance components of the pixel values within a vertical filter buffer, then vertically filtering luminance components of the pixel values using programmable luminance filter coefficients, and vertically filtering chrominance components of the pixel values using programmable chrominance filter coefficients. The filtered luminance component data and filtered chrominance component data is subsequently merged onto a single luminance/chrominance bus for further filtering and/or encoding. The luminance and chrominance filter coefficients are programmable and may be changed dynamically and repeatedly at picture boundaries. In one embodiment, the programmable vertical filter includes a four tap luminance component filter and a five tap chrominance component filter.Type: GrantFiled: February 22, 2002Date of Patent: December 27, 2005Assignee: International Business Machines CorporationInventors: James D. Greenfield, Barbara A. Hall, Agnes Y. Ngai, John M. Sutton
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Patent number: 6961378Abstract: Method and encoder for encoding a digital video image stream. The encoding includes spatial compression of still images in the video stream and temporal compression between the still images. The spatial compression is carried out by converting a time domain image of a macroblock to a frequency domain image of the macroblock, taking the discrete cosine transform of the frequency domain image, transforming the discrete cosine transformed macroblock image by a quantization factor, and run length encoding the quantized discrete cosine transformed macroblock image. The temporal compression is carried out by reconstructing the run length encoded, quantized, discrete cosine transformed image of the macroblock, searching for a best match macroblock, and constructing a motion vector between them. This forms a bitstream of run length encoded, quantized, discrete cosine transform macroblocks and of motion vectors. This bitstream is passed to and through an external buffer to a transmission medium.Type: GrantFiled: November 5, 1998Date of Patent: November 1, 2005Assignee: International Business Machines CorporationInventors: James D. Greenfield, John M. Kaczmarczyk, Agnes Y. Ngai
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Patent number: 6941025Abstract: Simultaneous vertical spatial filtering and chrominance conversion is achieved with reduced data buffering and simplified filtering circuits by using a single filter stage and hybrid filter coefficients. Data latency is reduced and performance requirements are reduced while avoiding critical signal propagation paths. The filter and buffers are fully compatible with any scan format having consecutively presented lines of image data, including both progressive and interlaced scan formats.Type: GrantFiled: April 19, 2001Date of Patent: September 6, 2005Assignee: International Business Machines CorporationInventors: James D. Greenfield, Agnes Y. Ngai, John M. Sutton, Edward F. Westermann
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Patent number: 6720893Abstract: A technique is provided for programmably controlling output of compressed data from, for example, a video encoder. The technique can be implemented within the video encoder and includes buffering the compressed data in a write buffer, followed by transferring the compressed data from the write buffer to a read buffer. At least one programmable output mode is provided for selectively controlling output of the compressed data from the read buffer. When the read buffer is full, the compressed data is stored to the encoder's external memory to await transfer to the read buffer. The at least one programmable mode can include a slave mode, a gated master mode, a multi-cycle speed mode, and a paced master mode, which may be employed individually or in combination. A mechanism for inserting pad bytes of data into the compressed data is also provided.Type: GrantFiled: February 22, 2002Date of Patent: April 13, 2004Assignee: International Business Machines CorporationInventors: James D. Greenfield, Barbara A. Hall, Agnes Y. Ngai, Edward F. Westermann
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Publication number: 20030185297Abstract: Plural encoders operating in parallel to achieve a desired data rate have their respective outputs combined by an autonomously operating arrangement for transfer of data to a direct memory access arrangement from respective encoders in order in response to a signal asserted upon completion of encoding and output of encoded data corresponding to a predetermined portion of input data. buffering of encoder output can be either internal or external to the encoders. Zero bytes which may be inherently generated at the beginning and end of an encoder output stream may be suppressed to improve encoded signal quality and efficiency.Type: ApplicationFiled: March 28, 2002Publication date: October 2, 2003Applicant: International Business Machines CorporationInventors: James D. Greenfield, Barbara A. Hall, Agnes Y. Ngai, Edward F. Westermann
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Publication number: 20030165197Abstract: A technique is provided for programmably vertically filtering pixel values of frames of a sequence of video frames. The technique includes separating luminance components and chrominance components of the pixel values within a vertical filter buffer, then vertically filtering luminance components of the pixel values using programmable luminance filter coefficients, and vertically filtering chrominance components of the pixel values using programmable chrominance filter coefficients. The filtered luminance component data and filtered chrominance component data is subsequently merged onto a single luminance/chrominance bus for further filtering and/or encoding. The luminance and chrominance filter coefficients are programmable and may be changed dynamically and repeatedly at picture boundaries. In one embodiment, the programmable vertical filter includes a four tap luminance component filter and a five tap chrominance component filter.Type: ApplicationFiled: February 22, 2002Publication date: September 4, 2003Applicant: International Business Machines CorporationInventors: James D. Greenfield, Barbara A. Hall, Agnes Y. Ngai, John M. Sutton
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Publication number: 20030160893Abstract: A technique is provided for programmably controlling output of compressed data from, for example, a video encoder. The technique can be implemented within the video encoder and includes buffering the compressed data in a write buffer, followed by transferring the compressed data from the write buffer to a read buffer. At least one programmable output mode is provided for selectively controlling output of the compressed data from the read buffer. When the read buffer is full, the compressed data is stored to the encoder's external memory to await transfer to the read buffer. The at least one programmable mode can include a slave mode, a gated master mode, a multi-cycle speed mode, and a paced master mode, which may be employed individually or in combination. A mechanism for inserting pad bytes of data into the compressed data is also provided.Type: ApplicationFiled: February 22, 2002Publication date: August 28, 2003Applicant: International Business Machines CorporationInventors: James D. Greenfield, Barbara A. Hall, Agnes Y. Ngai, Edward F. Westermann
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Publication number: 20020163594Abstract: Simultaneous vertical spatial filtering and chrominance conversion is achieved with reduced data buffering and simplified filtering circuits by using a single filter stage and hybrid filter coefficients. Data latency is reduced and performance requirements are reduced while avoiding critical signal propagation paths. The filter and buffers are fully compatible with any scan format having consecutively presented lines of image data, including both progressive and interlaced scan formats.Type: ApplicationFiled: April 19, 2001Publication date: November 7, 2002Applicant: International Business Machines CorporationInventors: James D. Greenfield, Agnes Y. Ngai, John M. Sutton, Edward F. Westermann
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Patent number: 6020934Abstract: A method for compensating for reduced picture quality when combining a multi-chip encoding chipset into a single integrated semiconductor IC. The method includes additional functions provided on the single IC to compensate for the negative effects on picture quality produced as a result of rounding 8 bit luminance pixel data to 5 bits, where the luminance data values are supplied as input to the search function. The additional functions are collectively referred to as motion biasing and are applied to influence the choice of a "best match" motion type, which is well known in the art. The biasing is performed by the addition of a weight factor to a total difference result that is calculated by the search function. The biasing is applied only for the purpose of influencing the choice of a reference frame that is not necessarily the frame which produces an optimal motion vector, but rather will result in using fewer bits to encode macroblocks.Type: GrantFiled: March 23, 1998Date of Patent: February 1, 2000Assignee: International Business Machines CorporationInventors: James D. Greenfield, Barbara A. Hall, John A. Murdock, Agnes Y. Ngai, Stephen P. Pokrinchak
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Patent number: 5526054Abstract: A method for encoding bitstream headers in a processor where templates for the bitstream header are stored in a processor buffer. The templates are addressable by programmable instructions, and the processor has a status register containing a bit for each header type. The status register is modifiable during the encoding process with a data pattern indicating the headers needed for encoding with the bitstream. In this way when a bit is set to 1 the predefined header type is generated and shipped to the bitstream. The header is generated by processing the header buffer template entries associated with the header type.Type: GrantFiled: March 27, 1995Date of Patent: June 11, 1996Assignee: International Business Machines CorporationInventors: James D. Greenfield, Diane M. Mauersberg, Agnes Y. Ngai
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Patent number: 5477240Abstract: A method for scrolling, at a desired rate and in a given direction, a graphic character on a display having a predetermined number of actual scan lines and a vertical blanking interval occurring between successive display of all the actual horizontal scan lines of the display, involves the creation of fractional scan lines between successive vertical blanking intervals, the identification of leading and trailing edges of the character and the selective changing of the color or shading of pixels of the leading and trailing edges to effect scolling of the character.Type: GrantFiled: April 7, 1992Date of Patent: December 19, 1995Assignee: Q-Co Industries, Inc.Inventors: Samuel J. Huebner, James D. Greenfield
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Patent number: 5410655Abstract: An apparatus for intersystem I/O channel paging. The I/O channel through an I/O channel adapter provides communication between a central processor, an I/O processor, and a shared electronic storage device. The central processor and I/O processor are each enabled for recognizing specific instructions. The intersystem channel may be implemented in the form of a page chain table. Either process is capable of constructing a page chain table in the shared electronic storage device, upon receipt of appropriate instructions. The central processor or I/O processor signals the I/O channel adapter with identification of a page chain table to select. The I/O channel adapter fetches table entries and executes the table. The I/O channel adapter initiates I/O activity upon execution of the table. The I/O channel is not dependent upon the central processor or I/O processor for fetching or executing instructions, rather it acts independent of the processors once the page chain table is created.Type: GrantFiled: September 13, 1994Date of Patent: April 25, 1995Assignee: International Business Machines CorporationInventors: James D. Greenfield, Matthew J. Mitchell, Jr., William R. Taylor