Abstract: Methods, software and systems to determine channel ownership and physical block location within the channel in non-uniformly distributed DRAM configurations and also to detect in-range memory address matches are presented. A first method, which may also be implemented in software and/or hardware, allocates memory non-uniformly between a number of memory channels, determines a selected memory channel from the memory channels for a program address, and maps the program address to a physical address within the selected memory channel. A second method, which may also be implemented in software and/or hardware, designates a range of memory to perform address matching, monitors memory accesses and when a memory access occurs with the specified range, perform a particular function.

Abstract: A method of debugging code that executes in a multithreaded processor having a microengines includes receiving a program instruction and an identification representing a selected one of the microengines from a remote user interface connected to the processor pausing program execution in the threads executing in the selected microengine, inserting a breakpoint after a program instruction in the selected microengine that matches the program instruction received from the remote user interface, resuming program execution in the selected microengine, executing a breakpoint routine if program execution in the selected microengine encounters the breakpoint and resuming program execution in the microengine.

Abstract: Applications software can be rapidly tested and developed for a multi-processor chip even though the hardware of new processors of the multi-processor chip is not yet available. This can be accomplished by executing software simulations of the new processor designs and corresponding applications software either on a previously designed processor that is hardware on the multi-processor chip or on a workstation development platform. The execution of the previously designed processor is typically much faster than the execution on a simulator running on a personal workstation development platform, and therefore the execution time is quicker. Furthermore, the processor simulation and application software can be configured to take advantage of the platform most appropriate for execution and avoid simulation of portions of the new processors that are not necessary for testing the applications software.

Abstract: A method of debugging software that executes in a multithreaded processor having a plurality of microengines includes pausing program execution in threads of execution within a target microengine, inserting a segment of executable code into an unused section of the target microengine's microstore, executing the segment of executable code in the target microengine and resuming program execution in the target microengine

Abstract: A method of debugging software that executes in a multithreaded processor having a plurality of microengines includes pausing program execution in threads of execution within a target microengine, inserting a segment of executable code into an unused section of the target microengine's microstore, executing the segment of executable code in the target microengine and resuming program execution in the target microengine

Abstract: A method of debugging code that executes in a multithreaded processor having a microengines includes receiving a program instruction and an identification representing a selected one of the microengines from a remote user interface connected to the processor pausing program execution in the threads executing in the selected microengine, inserting a breakpoint after a program instruction in the selected microengine that matches the program instruction received from the remote user interface, resuming program execution in the selected microengine, executing a breakpoint routine if program execution in the selected microengine encounters the breakpoint and resuming program execution in the microengine.

Abstract: A method of managing a free list and ring data structure, which may be used to store journaling information, by storing and modifying information describing a structure of the free list or ring data structure in a cache memory that may also be used to store information describing a structure of a queue of buffers.

Abstract: A method and mechanism for executing an application by a processor in a multi-processor configuration of processors, each having an associated instruction memory is presented. The application receives object code that includes an image for at least one other processor in the multi-processor configuration of processors. The application binds an import variable in the image to a parameter value and stores the image for the at least one other processor into the associated instruction memory.

Abstract: A method of debugging code that executes in a multithreaded processor having microengines includes receiving a journal write command and an identification representing a selected one of the microengines from a remote user interface connected to the processor, pausing program execution in the threads executing in the selected microengine, inserting a journal write command at a current program counter in the selected microengine, resuming program execution in the selected microengine, executing a write to a journal routine if program execution in the selected microengine encounters the journal write command and resuming program execution in the microengine.

Abstract: A method and mechanism for executing an application by a processor in a multi-processor configuration of processors, each having an associated instruction memory is presented. The application receives object code that includes an image for at least one other processor in the multi-processor configuration of processors. The application binds an import variable in the image to a parameter value and stores the image for the at least one other processor into the associated instruction memory.

Abstract: A method of debugging code that executes in a multithreaded processor having microengines includes receiving a journal write command and an identification representing a selected one of the microengines from a remote user interface connected to the processor, pausing program execution in the threads executing in the selected microengine, inserting a journal write command at a current program counter in the selected microengine, resuming program execution in the selected microengine, executing a write to a journal routine if program execution in the selected microengine encounters the journal write command and resuming program execution in the microengine.

Abstract: Applications software can be rapidly tested and developed for a multi-processor chip even though the hardware of new processors of the multi-processor chip is not yet available. This can be accomplished by executing software simulations of the new processor designs and corresponding applications software either on a previously designed processor that is hardware on the multi-processor chip or on a workstation development platform. The execution of the previously designed processor is typically much faster than the execution on a simulator running on a personal workstation development platform, and therefore the execution time is quicker. Furthermore, the processor simulation and application software can be configured to take advantage of the platform most appropriate for execution and avoid simulation of portions of the new processors that are not necessary for testing the applications software.