Abstract: Described herein are methods and compositions for treating an ER-related disease condition characterized by a mutation in the ESR1 gene by administering an estrogen receptor modulator. Also described herein are methods of treating hormone resistant-estrogen receptor (ER) positive breast cancers characterized by a mutation in the ESR1 gene by administering an estrogen receptor modulator.

Abstract: Described herein are methods and compositions for treating an ER-related disease condition characterized by a mutation in the ESR1 gene by administering an estrogen receptor modulator. Also described herein are methods of treating hormone resistant-estrogen receptor (ER) positive breast cancers characterized by a mutation in the ESR1 gene by administering an estrogen receptor modulator.

Abstract: A single address register control technique for a memory controller allows both cache "reads" and page-mode "writes" to be implemented without requiring separate hardware address registers for each function. Because both functions may be implemented with virtually no performance loss in a high performance memory system using a single address register, a comparator, and one additional register, the costs and other disadvantages inherent in otherwise replicating control registers are obviated.

Abstract: A GaAs SCFL RAM having a unique three-voltage-level write circuit, direct-read circuitry with only one gate delay, diode-coupled FET logic cells, and peripheral circuitry with SCFL gates. The memory module architecture and plan of the RAM allow for several design options which may include 1K.times.16 and 16K.times.1 memory configurations. The RAM incorporates strobe circuitry for powering down selected memory modules, without loss of data, thus reducing power dissipation. The SCFL circuitry of the RAM functions with closely matched complementary signals for fast switching with minimum current spiking. The RAM has a wide range of threshold voltage tolerance, excellent noise margin, and a very high level of radioactive radiation hardness.

Abstract: A device for converting time varying signals which represent sin .theta. and cos .theta. of an angle .theta., where can take on values over a range, to an n bit digital signal. The range is typically 2.pi. radians and is segmented into 2.sup.n+1 -4 segments. The segments are mapped into 2.sup.n -1 amplitudes, and are encoded as the n bit digital signal. The invention is particularly useful as an angle digitizer where .theta. represents the phase difference between an input signal and a reference signal. As an angle digitizer, harmonic rejection is enhanced by the efficient use of the n bits to distinguish amplitude states as opposed to distinguishing merely phase states.

Abstract: Means and methods are provided for processing the quantity Si which corresponds to a point i in space where Si=(Xi.sup.2 +Yi.sup.2).sup.1/2 and Xi and Yi are quantities lying along mutually orthogonal axes in the space. Si is approximated by the expression A.vertline.Xi.vertline.+B.vertline.Yi.vertline. where A and B are constant coefficients selected to minimize the error in value of Si according to a selected error computation. A and B can be approximated as a binary power series with each series including a preselected number of terms. Another embodiment does not require means for approximating A and B as binary power series, but segments the coordinate space into m sectors and computes and Am and Bm for each of said m sectors. A particularly advantageous application of the invention is its use in a device and method for processing edge data concerning an edge in an optical image where Si is the Sobel, Prewitt or Roberts square root edge operators.

Abstract: A monolithic integrated circuit is provided in which signals from concurrently operating information sources are each provided to a corresponding signal processing cell in an array thereof. These cells can each communicate directly with surrounding nearest neighbor cells both to and from. Each such signal processing cell is capable of being directed in parallel to perform selected signal processing operations including operations involving data from many cells. Communications between cells can be effected using charge coupled devices, and the signal processing operations in a cell can be performed by a floating gate regenerator.

Abstract: An apparatus directed to a signal processing circuit for combining data from several spectral bands to enhance the signal-to-background ratio of a target detection system. Two spectral bands, with separate sensing arrays, receive analog signals which are fed to separate multiplexer units. From the multiplexers, the analog signals are applied to a comparator where they are compared with each other and also separately applied to shift registers where the signals are retained for further processing. If, during comparison, the ratio of the two bands is less than a threshold, there is an absence of cloud return and the signals stored in both shift registers are combined in a final output register. If the ratio of the two bands is more than a threshold, the band having the most cloud return is not used and the shift register containing the greater percentage of target return is processed through the output register.

Abstract: Apparatus for determining the direction a lens should be moved in order to provide a proper focus of a remote object on a predetermined plane. A plurality of radiation detectors are positioned to receive radiation in first and second patterns from the object and to produce signals in accordance therewith. A first group of radiation detectors, produces signals indicative of the radiation received on the first pattern while a second group of radiation detectors produces signals indicative of the radiation received, in the second pattern. The two patterns coincide at the proper focus but at other than the proper focus position, the two patterns are spaced from one another in a direction which depends upon the direction the lens should be moved to achieve proper focus.