Abstract: A nonvolatile static random access memory cell (10) for storing data in a nonvolative state and recalling the data in its true state is disclosed. Cross-coupled transistors (12, 14) are provided having respective first and second nodes (16, 18) which are maintained at complementary logic states for volatile data storage. At least one tunnel capacitor (34), each having a floating node (36) is operatively coupled to the gate and drain terminals of one of said cross-coupled transistors (12, 14). At least one switch transistor (48) is operatively coupled to one of the first and second nodes (16, 18) and to one tunnel capacitor floating node (36). The at least one tunnel capacitor (34) and the at least one switch transistor (48) operatively coact for nonvolatile saving of volatile data stored in the cross-coupled transistors (12, 14), for recalling nonvolatile stored data in its true state to the cross-coupled transistors (12, 14), by the capacitive imbalance on the first and second nodes (16, 18).