Patents by Inventor James Deak
James Deak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140021571Abstract: The present invention discloses a design and manufacturing method for a single-chip magnetic sensor bridge. The sensor bridge comprises four magnetoresistive elements. The magnetization of the pinned layer of each of the four magnetoresistive elements is set in the same direction, but the magnetization directions of the free layers of the magnetoresistive elements on adjacent arms of the bridge are set at different angles with respect to the pinned layer magnetization direction. The absolute values of the angles of the magnetization directions of the free layers of all four magnetoresistive elements are the same with respect with their pinning layers. The disclosed magnetic biasing scheme enables the integration of a push-pull Wheatstone bridge magnetic field sensor on a single chip with better performance, lower cost, and easier manufacturability than conventional magnetoresistive sensor designs.Type: ApplicationFiled: April 1, 2012Publication date: January 23, 2014Inventors: Xiaofeng Lei, Insik Jin, James Deak, Weifeng Geza Shen, Mingfeng Liu, Songsheng Xue
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Publication number: 20080042834Abstract: A tamper detecting enclosure arrangement for enclosures containing an interior space in which a protected item is positioned having a magnetoresistive sensing memory storage cell positioned in or near the protected item in the enclosure having a two state offset magnetoresistance versus externally applied magnetic field. A magnet is positioned at a selected separation distance from the magnetoresistive sensing memory storage cell to thereby provide a magnetic field about the magnetoresistive sensing memory storage cell if said enclosure has not been opened in such a manner as to result in substantially increasing said separation distance.Type: ApplicationFiled: April 20, 2007Publication date: February 21, 2008Applicant: NVE CorporationInventors: James Daughton, James Deak
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Publication number: 20070161127Abstract: The present invention provides a method of forming an MRAM cell which minimizes the occurrence of electrical shorts during fabrication. A first conductor in a trench is provided in an insulating layer and an upper surface of the insulating layer and the first conductor is planarized. Then, a dielectric layer is deposited to a thickness slightly greater than the desired final thickness of a sense layer, which is formed later. The dielectric layer is then patterned and etched to form an opening for the cell shapes over the first conductor. Then, a permalloy is electroplated in the cell shapes to form the sense layer. The sense layer and dielectric layer are flattened and then a nonmagnetic tunnel barrier layer is deposited. Finally, the pinned layer is formed over the tunnel barrier layer.Type: ApplicationFiled: January 25, 2007Publication date: July 12, 2007Inventors: Hasan Nejad, James Deak
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Publication number: 20070020775Abstract: An MRAM device includes an array of magnetic memory cells having an upper conductive layer and a lower conductive layer separated by a barrier layer. To reduce the likelihood of electrical shorting across the barrier layers of the memory cells, spacers can be formed around the upper conductive layer and, after the layers of the magnetic memory cells have been etched, the memory cells can be oxidized to transform any conductive particles that are deposited along the sidewalls of the memory cells as byproducts of the etching process into nonconductive particles. Alternatively, the lower conductive layer can be repeatedly subjected to partial oxidation and partial etching steps such that only nonconductive particles can be thrown up along the sidewalls of the memory cells as byproducts of the etching process.Type: ApplicationFiled: September 26, 2006Publication date: January 25, 2007Applicant: MICRON TECHNOLOGY, INC.Inventors: Joel Drewes, James Deak
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Publication number: 20060234397Abstract: A method is provided for fabricating a fixed layer for a MRAM device. The method includes providing the fixed layer. The fixed layer includes an antiferromagnetic pinning layer over a substrate and a ferromagnetic pinned layer over the pinning layer, the pinned layer having a first thickness. The fixed layer further includes a spacer layer over the pinned layer, and a ferromagnetic reference layer over the spacer layer, the reference layer having a second thickness. The method further includes annealing the fixed layer using a temporal temperature/magnetic field profile, the profile having a maximum magnetic field magnitude (Hanneal). The profile is selected based on the first thickness of the pinned layer and the second thickness of the reference layer.Type: ApplicationFiled: June 12, 2006Publication date: October 19, 2006Inventor: James Deak
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Publication number: 20060226458Abstract: A magnetic memory element includes a sense structure, a tunnel barrier adjacent the sense structure, and a synthetic antiferromagnet (SAF) adjacent the tunnel barrier on a side opposite the sense structure. The SAF includes an antiferromagnetic structure adjacent a ferromagnetic seed layer. The ferromagnetic seed layer provides a texture so that the antiferromagnetic structure deposited on the ferromagnetic seed layer has reduced pinning field dispersion.Type: ApplicationFiled: May 9, 2006Publication date: October 12, 2006Inventor: James Deak
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Publication number: 20060192235Abstract: An MRAM device includes an array of magnetic memory cells having an upper conductive layer and a lower conductive layer separated by a barrier layer. To reduce the likelihood of electrical shorting across the barrier layers of the memory cells, spacers can be formed around the upper conductive layer and, after the layers of the magnetic memory cells have been etched, the memory cells can be oxidized to transform any conductive particles that are deposited along the sidewalls of the memory cells as byproducts of the etching process into nonconductive particles. Alternatively, the lower conductive layer can be repeatedly subjected to partial oxidation and partial etching steps such that only nonconductive particles can be thrown up along the sidewalls of the memory cells as byproducts of the etching process.Type: ApplicationFiled: April 27, 2006Publication date: August 31, 2006Inventors: Joel Drewes, James Deak
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Publication number: 20060192304Abstract: A method is provided for fabricating a fixed layer for a MRAM device. The method includes providing the fixed layer. The fixed layer includes an antiferromagnetic pinning layer over a substrate and a ferromagnetic pinned layer over the pinning layer, the pinned layer having a first thickness. The fixed layer further includes a spacer layer over the pinned layer, and a ferromagnetic reference layer over the spacer layer, the reference layer having a second thickness. The method further includes annealing the fixed layer using a temporal temperature/magnetic field profile, the profile having a maximum magnetic field magnitude (Hanneal). The profile is selected based on the first thickness of the pinned layer and the second thickness of the reference layer.Type: ApplicationFiled: May 1, 2006Publication date: August 31, 2006Inventor: James Deak
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Publication number: 20060077707Abstract: A ferromagnetic thin-film based digital memory having a substrate supporting bit structures that are electrically interconnected with information storage and retrieval circuitry and having first and second oppositely oriented relatively fixed magnetization layers and a ferromagnetic material film in which a characteristic magnetic property is substantially maintained below an associated critical temperature above which such magnetic property is not maintained. This ferromagnetic material film is separated from the first and second fixed magnetization films by corresponding layers of a nonmagnetic materials one being electrically insulative and that one remaining being electrically conductive. Each bit structure has an interconnection structure providing electrical contact thereto at a contact surface thereof substantially parallel to the intermediate layer positioned between the first contact surface and the substrate.Type: ApplicationFiled: October 12, 2005Publication date: April 13, 2006Applicant: NVE CorporationInventor: James Deak
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Publication number: 20060076635Abstract: The invention includes a construction comprising an MRAM device between a pair of conductive lines. Each of the conductive lines can generate a magnetic field encompassing at least a portion of the MRAM device. Each of the conductive lines is surrounded on three sides by magnetic material to concentrate the magnetic fields generated by the conductive lines at the MRAM device. The invention also includes a method of forming an assembly containing MRAM devices. A plurality of MRAM devices are formed over a substrate. An electrically conductive material is formed over the MRAM devices, and patterned into a plurality of lines. The lines are in a one-to-one correspondence with the MRAM devices and are spaced from one another. After the conductive material is patterned into lines, a magnetic material is formed to extend over the lines and within spaces between the lines.Type: ApplicationFiled: December 5, 2005Publication date: April 13, 2006Inventors: Hasan Nejad, James Deak
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Publication number: 20060019422Abstract: Structures and methods for providing magnetic shielding for integrated circuits are disclosed. The shielding comprises a foil or sheet of magnetically permeable material applied to an outer surface of a molded (e.g., epoxy) integrated circuit package. The foil can be held in place by adhesive or by mechanical means. The thickness of the shielding can be tailored to a customer's specific needs, and can be applied after all high temperature processing, such that a degaussed shield can be provided despite use of strong magnetic fields during high temperature processing, which fields are employed to maintain pinned magnetic layers within the integrated circuit.Type: ApplicationFiled: September 23, 2005Publication date: January 26, 2006Inventors: Mark Tuttle, James Deak
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Publication number: 20060003471Abstract: The present invention seeks to reduce the amount of current required for a write operation by using a process for forming the read conductor within a recessed write conductor, the write conductor itself formed within a trench of an insulating layer. The present invention protects the MTJ from the voltages created by the write conductor by isolating the write conductor and enabling the reduction of current necessary to write a bit of information.Type: ApplicationFiled: August 29, 2005Publication date: January 5, 2006Inventor: James Deak
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Publication number: 20050242382Abstract: A ferromagnetic thin-film based digital memory having a substrate formed of a base supporting an electrically insulating material primary substrate layer in turn supporting a plurality of current control devices each having an interconnection arrangement with each of said plurality of current control devices being separated from one another by spacer material therebetween and being electrically interconnected with information storage and retrieval circuitry. A plurality of bit structures are each supported on and electrically connected to a said interconnection arrangement of a corresponding one of said plurality of current control devices and have magnetic material films in which a characteristic magnetic property is substantially maintained below an associated critical temperature above which such magnetic property is not maintained of which two are separated by at least one intermediate layer of a nonmagnetic material having two major surfaces on opposite sides thereof.Type: ApplicationFiled: April 28, 2005Publication date: November 3, 2005Applicant: NVE CorporationInventors: James Daughton, James Deak, Arthur Pohm
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Publication number: 20050169046Abstract: A closed flux magnetic memory cell has a ferromagnetic pinned structure and a ferromagnetic free structure. Data is stored by controlling the relative magnetization between the pinned and free structures. The free structure is formed as a horizontally extending toroid, or tube, that is insulated from the pinned structure. A first conductive line passes through the center of the free structure while a second conductive line is connected to the pinned structure. A third conductive line can be formed through the free structure. This line is insulated from the toroid and the first conductor. The third conductive line can also be located outside the free structure. In operation of one embodiment, the first and third conductive lines are used to control the magnetized direction of the free structure. A resistance between the first and second conductive lines defines the data stored in the memory cell.Type: ApplicationFiled: March 28, 2005Publication date: August 4, 2005Inventor: James Deak
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Publication number: 20050164414Abstract: A method is provided for fabricating a fixed layer for a MRAM device. The method includes providing the fixed layer. The fixed layer includes an antiferromagnetic pinning layer over a substrate and a ferromagnetic pinned layer over the pinning layer, the pinned layer having a first thickness. The fixed layer further includes a spacer layer over the pinned layer, and a ferromagnetic reference layer over the spacer layer, the reference layer having a second thickness. The method further includes annealing the fixed layer using a temporal temperature/magnetic field profile, the profile having a maximum magnetic field magnitude (Hanneal). The profile is selected based on the first thickness of the pinned layer and the second thickness of the reference layer.Type: ApplicationFiled: January 26, 2004Publication date: July 28, 2005Inventor: James Deak
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Publication number: 20050146912Abstract: A magnetic memory element includes a sense structure, a tunnel barrier adjacent the sense structure, and a synthetic antiferromagnet (SAF) adjacent the tunnel barrier on a side opposite the sense structure. The SAF includes an antiferromagnetic structure adjacent a ferromagnetic seed layer. The ferromagnetic seed layer provides a texture so that the antiferromagnetic structure deposited on the ferromagnetic seed layer has reduced pinning field dispersion.Type: ApplicationFiled: December 29, 2003Publication date: July 7, 2005Inventor: James Deak
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Publication number: 20050122773Abstract: The present invention seeks to reduce the amount of current required for a write operation by using a process for forming the read conductor within a recessed write conductor, the write conductor itself formed within a trench of an insulating layer. The present invention protects the MTJ from the voltages created by the write conductor by isolating the write conductor and enabling the reduction of current necessary to write a bit of information.Type: ApplicationFiled: January 3, 2005Publication date: June 9, 2005Inventor: James Deak
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Publication number: 20050078512Abstract: A magnetic random access memory (MRAM) is compensated for write current shunting by varying the bit size of each MRAM cell with position along the write line. The MRAM includes a plurality of magnetic tunnel junction memory cells arranged in an array of columns and rows. The width of each memory cell increases along a write line to compensate for write current shunting.Type: ApplicationFiled: August 26, 2004Publication date: April 14, 2005Inventor: James Deak
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Publication number: 20050079638Abstract: An MRAM device includes an array of magnetic memory cells having an upper conductive layer and a lower conductive layer separated by a barrier layer. To reduce the likelihood of electrical shorting across the barrier layers of the memory cells, spacers can be formed around the upper conductive layer and, after the layers of the magnetic memory cells have been etched, the memory cells can be oxidized to transform any conductive particles that are deposited along the sidewalls of the memory cells as byproducts of the etching process into nonconductive particles. Alternatively, the lower conductive layer can be repeatedly subjected to partial oxidation and partial etching steps such that only nonconductive particles can be thrown up along the sidewalls of the memory cells as byproducts of the etching process.Type: ApplicationFiled: October 14, 2003Publication date: April 14, 2005Inventors: Joel Drewes, James Deak
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Publication number: 20050040453Abstract: The invention includes a construction comprising an MRAM device between a pair of conductive lines. Each of the conductive lines can generate a magnetic field encompassing at least a portion of the MRAM device. Each of the conductive lines is surrounded on three sides by magnetic material to concentrate the magnetic fields generated by the conductive lines at the MRAM device. The invention also includes a method of forming an assembly containing MRAM devices. A plurality of MRAM devices are formed over a substrate. An electrically conductive material is formed over the MRAM devices, and patterned into a plurality of lines. The lines are in a one-to-one correspondence with the MRAM devices and are spaced from one another. After the conductive material is patterned into lines, a magnetic material is formed to extend over the lines and within spaces between the lines.Type: ApplicationFiled: August 17, 2004Publication date: February 24, 2005Inventors: Hasan Nejad, James Deak