Abstract: This application relates to an integrated circuit die (200) comprising a MEMS transducer structure (101) integrated with associated electronic circuitry (102). The electronic circuitry comprises a plurality of transistors and associated interconnections and is formed in a first area (103) of the die from a first plurality (104) of layers, e.g. formed by CMOS metal (107) and dielectric (108) layers and possibly doped areas (106) of substrate (105). The MEMS transducer structure is formed in a second area (111) of the die and is formed, at least partly, from a second plurality (112) of layers which are separate to the first plurality of layers. At least one filter circuit (201) is formed from said second plurality of layers overlying the plurality of transistors of the electronic circuitry (102).

Abstract: Amplifier arrangements for read-out of MEMS capacitive transducers, such as low-noise amplifiers. An amplifier circuit has first and second MOS transistors, with the gate of the first transistor driven by the input signal, and the gate of the second transistor driven by a reference. The sources of the first and second transistors are connected via an impedance. Modulation circuitry is arranged to monitor a signal with a value that varies with the input signal and to modulate the back-bias voltage between the bulk and source terminals of the first and second transistors with the applied modulation being equal for each transistor and based on said monitored signal. The back-bias of the first transistor can be increase to extend the input range of the transistor in situations where the input signal may otherwise result in signal clipping, while avoiding noise and power issues for other input signal levels.

Abstract: Amplifier arrangements for read-out of MEMS capacitive transducers, such as low-noise amplifiers. An amplifier circuit has first and second MOS transistors, with the gate of the first transistor driven by the input signal, and the gate of the second transistor driven by a reference. The sources of the first and second transistors are connected via an impedance. Modulation circuitry is arranged to monitor a signal with a value that varies with the input signal and to modulate the back-bias voltage between the bulk and source terminals of the first and second transistors with the applied modulation being equal for each transistor and based on said monitored signal. The back-bias of the first transistor can be increase to extend the input range of the transistor in situations where the input signal may otherwise result in signal clipping, while avoiding noise and power issues for other input signal levels.