Patents by Inventor James Douglas Ballard

James Douglas Ballard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12100740
    Abstract: An apparatus includes a first lateral diffusion field effect transistor (LDFET) having a first threshold voltage and that includes a first gate electrode, a first drain contact, a first source contact, and a first electrically conductive shield plate separated from the first gate electrode and the first source contact by a first interlayer dielectric. A second LDFET of the apparatus has a second threshold voltage and includes a second gate electrode, a second drain contact, and a second source contact. The second source contact is electrically connected to the first source contact of the first LDFET. A control circuit of the apparatus is electrically coupled to the first electrically conductive shield plate and is configured to apply to the first electrically conductive shield plate a first gate bias voltage of a first level to set the first threshold voltage of the first LDFET to a first desired threshold voltage.
    Type: Grant
    Filed: July 12, 2023
    Date of Patent: September 24, 2024
    Assignee: Silanna Asia Pte Ltd
    Inventors: Stuart B. Molin, George Imthurn, James Douglas Ballard, Yashodhan Vijay Moghe
  • Publication number: 20230369421
    Abstract: An apparatus includes a first lateral diffusion field effect transistor (LDFET) having a first threshold voltage and that includes a first gate electrode, a first drain contact, a first source contact, and a first electrically conductive shield plate separated from the first gate electrode and the first source contact by a first interlayer dielectric. A second LDFET of the apparatus has a second threshold voltage and includes a second gate electrode, a second drain contact, and a second source contact. The second source contact is electrically connected to the first source contact of the first LDFET. A control circuit of the apparatus is electrically coupled to the first electrically conductive shield plate and is configured to apply to the first electrically conductive shield plate a first gate bias voltage of a first level to set the first threshold voltage of the first LDFET to a first desired threshold voltage.
    Type: Application
    Filed: July 12, 2023
    Publication date: November 16, 2023
    Applicant: Silanna Asia Pte Ltd
    Inventors: Stuart B. Molin, George Imthurn, James Douglas Ballard, Yashodhan Vijay Moghe
  • Patent number: 11742396
    Abstract: An apparatus includes a first lateral diffusion field effect transistor (LDFET) having a first threshold voltage and that includes a first gate electrode, a first drain contact, a first source contact, and a first electrically conductive shield plate separated from the first gate electrode and the first source contact by a first interlayer dielectric. A second LDFET of the apparatus has a second threshold voltage and includes a second gate electrode, a second drain contact, and a second source contact. The second source contact is electrically connected to the first source contact of the first LDFET. A control circuit of the apparatus is electrically coupled to the first electrically conductive shield plate and is configured to apply to the first electrically conductive shield plate a first gate bias voltage of a first level to set the first threshold voltage of the first LDFET to a first desired threshold voltage.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: August 29, 2023
    Assignee: Silanna Asia Pte Ltd
    Inventors: Stuart B. Molin, George Imthurn, James Douglas Ballard, Yashodhan Vijay Moghe
  • Publication number: 20220059663
    Abstract: An apparatus includes a first lateral diffusion field effect transistor (LDFET) having a first threshold voltage and that includes a first gate electrode, a first drain contact, a first source contact, and a first electrically conductive shield plate separated from the first gate electrode and the first source contact by a first interlayer dielectric. A second LDFET of the apparatus has a second threshold voltage and includes a second gate electrode, a second drain contact, and a second source contact. The second source contact is electrically connected to the first source contact of the first LDFET. A control circuit of the apparatus is electrically coupled to the first electrically conductive shield plate and is configured to apply to the first electrically conductive shield plate a first gate bias voltage of a first level to set the first threshold voltage of the first LDFET to a first desired threshold voltage.
    Type: Application
    Filed: November 8, 2021
    Publication date: February 24, 2022
    Applicant: Silanna Asia Pte Ltd
    Inventors: Stuart B. Molin, George Imthurn, James Douglas Ballard, Yashodhan Vijay Moghe
  • Patent number: 11171215
    Abstract: An apparatus includes a first lateral diffusion field effect transistor (LDFET) having a first threshold voltage and that includes a first gate electrode, a first drain contact, a first source contact, and a first electrically conductive shield plate separated from the first gate electrode and the first source contact by a first interlayer dielectric. A second LDFET of the apparatus has a second threshold voltage and includes a second gate electrode, a second drain contact, and a second source contact. The second source contact is electrically connected to the first source contact of the first LDFET. A control circuit of the apparatus is electrically coupled to the first electrically conductive shield plate and is configured to apply to the first electrically conductive shield plate a first gate bias voltage of a first level to set the first threshold voltage of the first LDFET to a first desired threshold voltage.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: November 9, 2021
    Assignee: Silanna Asia Pte Ltd
    Inventors: Stuart B. Molin, George Imthurn, James Douglas Ballard, Yashodhan Vijay Moghe
  • Publication number: 20200258988
    Abstract: An apparatus includes a first lateral diffusion field effect transistor (LDFET) having a first threshold voltage and that includes a first gate electrode, a first drain contact, a first source contact, and a first electrically conductive shield plate separated from the first gate electrode and the first source contact by a first interlayer dielectric. A second LDFET of the apparatus has a second threshold voltage and includes a second gate electrode, a second drain contact, and a second source contact. The second source contact is electrically connected to the first source contact of the first LDFET. A control circuit of the apparatus is electrically coupled to the first electrically conductive shield plate and is configured to apply to the first electrically conductive shield plate a first gate bias voltage of a first level to set the first threshold voltage of the first LDFET to a first desired threshold voltage.
    Type: Application
    Filed: April 27, 2020
    Publication date: August 13, 2020
    Applicant: Silanna Asia Pte Ltd
    Inventors: Stuart B. Molin, George Imthurn, James Douglas Ballard, Yashodhan Vijay Moghe
  • Patent number: 10636905
    Abstract: An LDFET is disclosed. A source region is electrically coupled to a source contact. A lightly doped drain (LDD) region has a lower dopant concentration than the source region, and is separated from the source region by a channel. A highly doped drain region forms an electrically conductive path between a drain contact and the LDD region. A gate electrode is located above the channel and separated from the channel by a gate dielectric. A shield plate is located above the gate electrode and the LDD region, and is separated from the LDD region, the gate electrode, and the source contact by a dielectric layer. A control circuit applies a variable voltage to the shield plate that: (1) accumulates a top layer of the LDD region before the transistor is switched on; and (2) depletes the top layer of the LDD region before the transistor is switched off.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: April 28, 2020
    Assignee: Silanna Asia Pte Ltd
    Inventors: George Imthurn, James Douglas Ballard, Yashodhan Vijay Moghe
  • Publication number: 20190148544
    Abstract: An LDFET is disclosed. A source region is electrically coupled to a source contact. A lightly doped drain (LDD) region has a lower dopant concentration than the source region, and is separated from the source region by a channel. A highly doped drain region forms an electrically conductive path between a drain contact and the LDD region. A gate electrode is located above the channel and separated from the channel by a gate dielectric. A shield plate is located above the gate electrode and the LDD region, and is separated from the LDD region, the gate electrode, and the source contact by a dielectric layer. A control circuit applies a variable voltage to the shield plate that: (1) accumulates a top layer of the LDD region before the transistor is switched on; and (2) depletes the top layer of the LDD region before the transistor is switched off.
    Type: Application
    Filed: December 28, 2018
    Publication date: May 16, 2019
    Inventors: George Imthurn, James Douglas Ballard, Yashodhan Vijay Moghe
  • Patent number: 10192983
    Abstract: An LDFET is disclosed. A source region is electrically coupled to a source contact. A lightly doped drain (LDD) region has a lower dopant concentration than the source region, and is separated from the source region by a channel. A highly doped drain region forms an electrically conductive path between a drain contact and the LDD region. A gate electrode is located above the channel and separated from the channel by a gate dielectric. A shield plate is located above the gate electrode and the LDD region, and is separated from the LDD region, the gate electrode, and the source contact by a dielectric layer. A control circuit applies a variable voltage to the shield plate that: (1) accumulates a top layer of the LDD region before the transistor is switched on; and (2) depletes the top layer of the LDD region before the transistor is switched off.
    Type: Grant
    Filed: January 16, 2017
    Date of Patent: January 29, 2019
    Assignee: Silanna Asia Pte Ltd
    Inventors: George Imthurn, James Douglas Ballard, Yashodhan Vijay Moghe
  • Publication number: 20170162658
    Abstract: An LDFET is disclosed. A source region is electrically coupled to a source contact. A lightly doped drain (LDD) region has a lower dopant concentration than the source region, and is separated from the source region by a channel. A highly doped drain region forms an electrically conductive path between a drain contact and the LDD region. A gate electrode is located above the channel and separated from the channel by a gate dielectric. A shield plate is located above the gate electrode and the LDD region, and is separated from the LDD region, the gate electrode, and the source contact by a dielectric layer. A control circuit applies a variable voltage to the shield plate that: (1) accumulates a top layer of the LDD region before the transistor is switched on; and (2) depletes the top layer of the LDD region before the transistor is switched off.
    Type: Application
    Filed: January 16, 2017
    Publication date: June 8, 2017
    Applicant: Silanna Asia Pte Ltd
    Inventors: George Imthurn, James Douglas Ballard, Yashodhan Vijay Moghe