Patents by Inventor James Douglas Wehrly

James Douglas Wehrly has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7542297
    Abstract: A flexible circuitry is populated with integrated circuitry (ICs) disposed along one or both of its major sides. Contacts are distributed along the flexible circuitry to provide connection between the module and an application environment. A rigid substrate is configured to provide space on one side where the populated flex is disposed while in some embodiments, heat management or cooling structures are arranged on one side of the module to mitigate thermal accumulation in the module.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: June 2, 2009
    Assignee: Entorian Technologies, LP
    Inventors: James Douglas Wehrly, Jr., Mark Wolfe, Paul Goodwin
  • Publication number: 20090124045
    Abstract: The present invention provides a system and method that mounts integrated circuit devices onto substrates and a system and method for employing the method in stacked modules. The contact pads of a packaged integrated circuit device are substantially exposed. A solder paste that includes higher temperature solder paste alloy is applied to a substrate or to the integrated circuit device to be mounted. The integrated circuit device is positioned to contact the contacts of the substrate. Heat is applied to create high temperature joints between the contacts of the substrate and the integrated circuit device resulting in a device-substrate assembly with high temperature joints. The formed joints are less subject to re-melting in subsequent processing steps. The method may be employed in devising stacked module constructions such as those disclosed herein as preferred embodiments in accordance with the invention. Typically, the created joints are low in profile.
    Type: Application
    Filed: January 20, 2009
    Publication date: May 14, 2009
    Inventors: Julian Partridge, James W. Cady, James Wilder, David L. Roper, James Douglas Wehrly, JR.
  • Patent number: 7524703
    Abstract: The present invention stacks integrated circuits (ICs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules provided herein. In a preferred embodiment in accordance with the invention, a form standard provides a physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design. In a preferred embodiment, the form standard will be devised of heat transference material such as copper to improve thermal performance. In an alternative embodiment, the form standard may include a heat spreader portion with mounting feet. In a preferred embodiment of the memory addressing system, a high speed switching system selects a data line associated with each level of a stacked module to reduce the loading effect upon data signals in memory access.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: April 28, 2009
    Assignee: Entorian Technologies, LP
    Inventors: James W. Cady, James Wilder, David L. Roper, James Douglas Wehrly, Jr.
  • Patent number: 7511969
    Abstract: A circuit module is provided in which at least one secondary substrate and preferably two such secondary substrates are populated with integrated circuits (ICs). A rigid core substrate for the circuit module is comprised of a structural member and a connective member. In a preferred embodiment, the structural member is comprised of thermally conductive material while the connective member is comprised of conventional PWB material. The secondary substrate(s) are connected to the connective member with a variety of techniques and materials while, in a preferred embodiment, the connective member exhibits, in a preferred embodiment, traditional module contacts which provide an edge connector capability to allow the module to supplant traditional DIMMs.
    Type: Grant
    Filed: February 2, 2006
    Date of Patent: March 31, 2009
    Assignee: Entorian Technologies, LP
    Inventor: James Douglas Wehrly, Jr.
  • Patent number: 7508058
    Abstract: The present invention provides an improvement on the use of flexible circuit connectors for electrically coupling IC devices to one another in a stacked configuration by use of the flexible circuit to provide the connection of the stacked IC module to other circuits. Use of the flexible circuit as the connection of the IC module allows the flexible circuit to provide strain relief and allows stacked IC modules to be assembled with a lower profile than with previous methods. The IC module can be connected to external circuits through the flexible circuit connectors by a variety of means, including solder pads, edge connector pads, and socket connectors. This allows for IC devices to occupy less space then with previous methods, which is beneficial in modules such as memory modules with multiple, stacked memory devices.
    Type: Grant
    Filed: January 11, 2006
    Date of Patent: March 24, 2009
    Assignee: Entorian Technologies, LP
    Inventor: James Douglas Wehrly, Jr.
  • Patent number: 7508069
    Abstract: The present invention provides a system and method for combining a leaded package IC and a semiconductor die using a flex circuitry to reduce footprint for the combination. A leaded IC package is disposed along the obverse side of a flex circuit. In a preferred embodiment, leads of the leaded IC package are configured to allow the lower surface of the body of the leaded IC package to contact the surface of the flex circuitry either directly or indirectly through an adhesive. A semiconductor die is connected to the reverse side of the flex circuit. In one embodiment, the semiconductor die is disposed on the reverse side of the flex while, in an alternative embodiment, the semiconductor die is disposed into a window in the flex circuit to rest directly or indirectly upon the body of the leaded IC package. Module contacts are provided in a variety of configurations. In a preferred embodiment, the leaded IC package is a flash memory and the semiconductor die is a controller.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: March 24, 2009
    Assignee: Entorian Technologies, LP
    Inventors: James Douglas Wehrly, Jr., Ron Orris, Leland Szewerenko, Tim Roy, Julian Partridge, David L. Roper
  • Publication number: 20090052124
    Abstract: Flexible circuitry is populated with integrated circuitry (ICs), and contacts are distributed along the flexible circuitry to provide connection to an application environment. The flexible circuitry is disposed about a rigid substrate, placing the ICs on one or both sides of the substrate with one or more layers of integrated circuitry on one or both sides of the substrate. The substrate is preferably devised from thermally-conductive materials and one or more thermal spreaders are in thermal contact with at least some of the ICs. Optionally, as an additional thermal management feature, the module may include a high thermal conductivity thermal sink or area that is disposed proximal to higher thermal energy IC devices. In preferred embodiments, extensions from the substrate body or substrate core encourage reduced thermal variations amongst the ICs of the module while providing an enlarged surface for shedding thermal energy from the module.
    Type: Application
    Filed: October 31, 2008
    Publication date: February 26, 2009
    Applicant: Entorian Technologies, L.P. (formerly Staktek Group, L.P)
    Inventors: James Douglas Wehrly, JR., James Wilder, Mark Wolfe, Paul Goodwin
  • Patent number: 7495334
    Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In a two-high CSP stack or module devised in accordance with a preferred embodiment of the present invention, two CSPs are stacked, with one CSP disposed above the other. The two CSPs are connected with flex circuitry. A form standard is disposed between the flex circuitry and a CSP in the stack. The form standard can take many configurations and may be used where flex circuits are used to connect CSPs to one another in stacked modules having two or more constituent CSPs. For example, in stacked modules that include four CSPs, three form standards are employed in preferred embodiments, although fewer may be used. The form standard provides a thermally conductive physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design.
    Type: Grant
    Filed: August 4, 2005
    Date of Patent: February 24, 2009
    Assignee: Entorian Technologies, LP
    Inventors: Russell Rapport, James W. Cady, James Wilder, David L. Roper, James Douglas Wehrly, Jr., Jeff Buchle, Julian Dowden
  • Publication number: 20090046431
    Abstract: Flexible circuitry is populated with integrated circuitry disposed along one or both of its major sides. Contacts distributed along the flexible circuitry provide connection between the module and an application environment. The circuit-populated flexible circuitry is disposed about an edge of a rigid substrate thus placing the integrated circuitry on one or both sides of the substrate with one or two layers of integrated circuitry on one or both sides of the substrate. The substrate form is preferably devised from thermally conductive materials and includes a high thermal conductivity core or area that is disposed proximal to higher thermal energy devices such as an AMB when the flex circuit is brought about the substrate. Other variations include thermally-conductive clips that grasp respective ICs on opposite sides of the module to further shunt heat from the ICs.
    Type: Application
    Filed: October 24, 2008
    Publication date: February 19, 2009
    Inventors: James Douglas Wehrly, Jr., James Wilder, Paul Goodwin, Mark Wolfe
  • Patent number: 7485951
    Abstract: An IC die and a flexible circuit structure are integrated into a lower stack element that can be stacked with either further integrated lower stack element iterations or with pre-packaged ICs in any of a variety of package types. The present invention may be employed to stack similar or dissimilar integrated circuits and may be used to create modularized systems. In a preferred embodiment, a die is positioned above the surface of portions of a pair of flex circuits. Connection is made between the die and the flex circuitry. A protective layer such as a molded plastic, for example, is formed to protect the flex-connected die and its connection to the flex. Connective elements are placed along the flex circuitry to create an array of module contacts along the second side of the flex circuitry. The flex circuitry is positioned above the body-protected die to create an integrated lower stack element.
    Type: Grant
    Filed: May 9, 2003
    Date of Patent: February 3, 2009
    Assignee: Entorian Technologies, LP
    Inventors: David L. Roper, Curtis Hart, James Wilder, Phill Bradley, James G. Cady, Jeff Buchle, James Douglas Wehrly, Jr.
  • Patent number: 7468553
    Abstract: The present invention provides a system and method for devising stackable assemblies that may be then stacked to create a stacked circuit module. One or more integrated circuit (IC) die are disposed on one or more sides of a redistribution substrate that is preferably flexible circuitry. In some preferred embodiments, the die and redistribution substrate are bonded together and wire-bond connected. Two or more stackable assemblies are interconnected through frame members to create low profile high density stacked circuit modules.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: December 23, 2008
    Assignee: Entorian Technologies, LP
    Inventors: Leland Szewerenko, Paul Goodwin, James Douglas Wehrly, Jr.
  • Patent number: 7459784
    Abstract: Flexible circuitry is populated with integrated circuitry disposed along one or both of its major sides. Contacts distributed along the flexible circuitry provide connection between the module and an application environment. The circuit-populated flexible circuitry is disposed about an edge of a rigid substrate thus placing the integrated circuitry on one or both sides of the substrate with one or two layers of integrated circuitry on one or both sides of the substrate. The substrate form is preferably devised from thermally conductive materials and includes a high thermal conductivity core or area that is disposed proximal to higher thermal energy devices such as an AMB when the flex circuit is brought about the substrate. Other variations include thermally-conductive clips that grasp respective ICs on opposite sides of the module to further shunt heat from the ICs.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: December 2, 2008
    Assignee: Entorian Technologies, LP
    Inventors: James Douglas Wehrly, Jr., James Wilder, Paul Goodwin, Mark Wolfe
  • Patent number: 7446410
    Abstract: Flexible circuitry is populated with integrated circuitry (ICs) disposed along one or both of major sides. Contacts are distributed along the flexible circuitry to provide connection between the module and an application environment. The populated flexible circuitry is disposed about an edge of a rigid substrate thus placing the integrated circuitry on one or both sides of the substrate with one or more layers of integrated circuitry on one or both sides of the substrate. The substrate form is preferably devised from thermally-conductive materials and one or more thermal spreaders are disposed in thermal contact with at least some of the constituent integrated circuitry of the module. Optionally, as an additional thermal management feature, the module may include a high thermal conductivity thermal sink or area that is disposed proximal to higher thermal energy IC devices.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: November 4, 2008
    Assignee: Entorian Technologies, LP
    Inventors: James Douglas Wehrly, Jr., James Wilder, Mark Wolfe, Paul Goodwin
  • Patent number: 7443023
    Abstract: Flexible circuitry is populated with integrated circuitry disposed along one or both of its major sides. Contacts distributed along the flexible circuitry provide connection between the module and an application environment. The circuit-populated flexible circuitry is disposed about an edge of a rigid substrate thus placing the integrated circuitry on one or both sides of the substrate with one or two layers of integrated circuitry on one or both sides of the substrate. The substrate form is preferably devised from thermally conductive materials and includes a high thermal conductivity core or area that is disposed proximal to higher thermal energy devices such as an AMB when the flex circuit is brought about the substrate. Other variations include thermally-conductive clips that grasp respective ICs on opposite sides of the module to further shunt heat from the ICs.
    Type: Grant
    Filed: September 21, 2005
    Date of Patent: October 28, 2008
    Assignee: Entorian Technologies, LP
    Inventors: James Douglas Wehrly, Jr., James Wilder, Paul Goodwin, Mark Wolfe
  • Publication number: 20080246134
    Abstract: The present invention provides a system and method for selectively stacking and interconnecting leaded packaged integrated circuit devices. In preferred embodiments, the plastic body of one or more leaded packaged ICs bear conductive traces that create circuitry to provide stacking related electrical interconnections between the constituent ICs of a stacked module without the use of separate interposers or carrier structures. Typically, the circuitry is borne by the body of the upper one of the ICs of a two-IC leaded package stack to implement stacking-related connections between the constituent ICs.
    Type: Application
    Filed: April 3, 2007
    Publication date: October 9, 2008
    Applicant: STAKTEK GROUP L.P.
    Inventors: Leland Szewerenko, James Douglas Wehrly
  • Publication number: 20080211077
    Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into low profile modules that conserve PWB or other board surface area. Low profile structures provide connection between CSPs of the stacked module and between and to the flex circuitry. Low profile contacts are created by any of a variety of methods and materials including, for example, screen paste techniques and use of high temperature solders, although other application techniques and traditional solders may be employed for creating low profile contacts in the present invention. A consolidated low profile contact structure and technique is provided for use in alternative embodiments of the present invention. The CSPs employed in stacked modules devised in accordance with the present invention are connected with flex circuitry. That flex circuitry may exhibit one or two or more conductive layers.
    Type: Application
    Filed: May 11, 2006
    Publication date: September 4, 2008
    Inventors: James W. Cady, Julian Partridge, James Douglas Wehrly, James Wilder, David L. Roper, Jeffrey Alan Buchle
  • Publication number: 20080120831
    Abstract: The present invention stacks integrated circuits into modules that conserve board surface area. In a precursor assembly devised as a component for a stacked circuit module in accordance with a preferred embodiment of the present invention, one or more stiffeners are disposed at least partially between a flex circuit and an integrated circuit. In a two-high stacked circuit module devised in accordance with a preferred embodiment of the present invention, an integrated circuit is stacked above a precursor assembly. The two integrated circuits are connected with the flex circuit of the precursor assembly. The present invention may be employed to advantage in numerous configurations and combinations of integrated circuits in modules.
    Type: Application
    Filed: October 16, 2007
    Publication date: May 29, 2008
    Inventor: James Douglas Wehrly
  • Patent number: 7371609
    Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In a preferred embodiment in accordance with the invention, a form standard associated with one or more CSPs provides a physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design. In a preferred embodiment, the contacts of the lower CSP will be compressed before flex circuitry is attached to a combination of the CSP and a form standard to create lower profile contacts between CSP and the flex circuitry.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: May 13, 2008
    Assignee: Staktek Group L.P.
    Inventors: Julian Partridge, James Douglas Wehrly, Jr.
  • Publication number: 20080093724
    Abstract: The present invention provides a system and method for devising stackable assemblies that may be then stacked to create a stacked circuit module. One or more integrated circuit (IC) die are disposed on one or more sides of a redistribution substrate that is preferably flexible circuitry. In some preferred embodiments, the die and redistribution substrate are bonded together and wire-bond connected. Two or more stackable assemblies are interconnected through frame members to create low profile high density stacked circuit modules.
    Type: Application
    Filed: March 6, 2007
    Publication date: April 24, 2008
    Applicant: STAKTEK GROUP L.P.
    Inventors: Leland Szewerenko, Paul Goodwin, James Douglas Wehrly
  • Publication number: 20080093734
    Abstract: A system a method for assembling dual-die integrated circuit packages using thermocompression bonding or thermosonic bonding to bond a second die to a substrate opposite a first die bonded to the substrate. The second die is bonded using heat conducted through the first die to the substrate, and optionally through an underfill material. The first and second die are connected such that bumps are connected to common bonding pads on the substrate. Bumps on one of the die extend through openings in the substrate to connect to the common bonding pads. The bonding pads are within the perimeter of the first die.
    Type: Application
    Filed: April 20, 2007
    Publication date: April 24, 2008
    Applicant: STAKTEK GROUP L.P.
    Inventors: Julian Partridge, Leland Szewerenko, James Douglas Wehrly