Patents by Inventor James E. Burdorf

James E. Burdorf has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods of reducing proximity effects in lithographic processes
    Patent number: 6319644
    Abstract: Methods of reducing proximity effects in lithographic processes wherein an integrated circuitry pattern is transferred from a mask onto a semiconductor substrate are described. In one embodiment, a desired spacing is defined between a main feature which is to reside on a mask and which is to be transferred onto the substrate, and an adjacent proximity effects-correcting feature. After the spacing definition, the dimensions of the main feature are adjusted relative to the proximity effects-correcting feature to achieve a desired transferred main feature dimension. In another embodiment, a desired spacing is defined between a main feature having an edge and an adjacent sub-resolution feature. The edge of the main feature is moved relative to the sub-resolution feature to achieve a desired transferred main feature dimension.
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: November 20, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Christophe Pierrat, James E. Burdorf, William Baggenstoss, William Stanton
  • Methods of reducing proximity effects in lithographic processes
    Publication number: 20010023045
    Abstract: Methods of reducing proximity effects in lithographic processes wherein an integrated circuitry pattern is transferred from a mask onto a semiconductor substrate are described. In one embodiment, a desired spacing is defined between a main feature which is to reside on a mask and which is to be transferred onto the substrate, and an adjacent proximity effects-correcting feature. After the spacing definition, the dimensions of the main feature, are adjusted relative to the proximity effects-correcting feature to achieve a desired transferred main feature dimension. In another embodiment, a desired spacing is defined between a main feature having an edge and an adjacent sub-resolution feature. The edge of the main feature is moved relative to the sub-resolution feature to achieve a desired transferred main feature dimension.
    Type: Application
    Filed: February 12, 2001
    Publication date: September 20, 2001
    Inventors: Christophe Pierrat, James E. Burdorf, William Baggenstoss, William Stanton
  • Methods of reducing proximity effects in lithographic processes
    Patent number: 6284419
    Abstract: Methods of reducing proximity effects in lithographic processes wherein an integrated circuitry pattern is transferred from a mask onto a semiconductor substrate are described. In one embodiment, a desired spacing is defined between a main feature which is to reside on a mask and which is to be transferred onto the substrate, and an adjacent proximity effects-correcting feature. After the spacing definition, the dimensions of the main feature are adjusted relative to the proximity effects-correcting feature to achieve a desired transferred main feature dimension. In another embodiment, a desired spacing is defined between a main feature having an edge and an adjacent sub-resolution feature. The edge of the main feature is moved relative to the sub-resolution feature to achieve a desired transferred main feature dimension.
    Type: Grant
    Filed: January 24, 2001
    Date of Patent: September 4, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Christophe Pierrat, James E. Burdorf, William Baggenstoss, William Stanton
  • Methods of reducing proximity effects in lithographic processes
    Publication number: 20010002304
    Abstract: Methods of reducing proximity effects in lithographic processes wherein an integrated circuitry pattern is transferred from a mask onto a semiconductor substrate are described. In one embodiment, a desired spacing is defined between a main feature which is to reside on a mask and which is to be transferred onto the substrate, and an adjacent proximity effects-correcting feature. After the spacing definition, the dimensions of the main feature are adjusted relative to the proximity effects-correcting feature to achieve a desired transferred main feature dimension. In another embodiment, a desired spacing is defined between a main feature having an edge and an adjacent sub-resolution feature. The edge of the main feature is moved relative to the sub-resolution feature to achieve a desired transferred main feature dimension.
    Type: Application
    Filed: January 24, 2001
    Publication date: May 31, 2001
    Inventors: Christophe Pierrat, James E. Burdorf, William Baggenstoss, William Stanton
  • Methods of reducing proximity effects in lithographic processes
    Patent number: 6120952
    Abstract: Methods of reducing proximity effects in lithographic processes wherein an integrated circuitry pattern is transferred from a mask onto a semiconductor substrate are described. In one embodiment, a desired spacing is defined between a main feature which is to reside on a mask and which is to be transferred onto the substrate, and an adjacent proximity effects-correcting feature. After the spacing definition, the dimensions of the main feature are adjusted relative to the proximity effects-correcting feature to achieve a desired transferred main feature dimension. In another embodiment, a desired spacing is defined between a main feature having an edge and an adjacent sub-resolution feature. The edge of the main feature is moved relative to the sub-resolution feature to achieve a desired transferred main feature dimension.
    Type: Grant
    Filed: October 1, 1998
    Date of Patent: September 19, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Christophe Pierrat, James E. Burdorf, William Baggenstoss, William Stanton