Abstract: The present invention relates to a hard disk drive system having overvoltage protection circuits for various types of overvoltage conditions. For example, the system comprises one or more hard disk drive integrated circuit chips residing on a board and a hard disk drive power plug receptacle residing on the board having two different value power supply ports associated therewith. The receptacle is operable to receive a power plug therein, wherein when the power plug is inserted therein in a proper orientation the two different value voltages are properly supplied to the one or more hard disk drive integrated circuit chips, and wherein when the power plug is inserted therein in an improper orientation the two different value voltages are switched with respect to their intended values. The system comprises a reverse power plug orientation protection circuit coupled between the hard disk drive power plug receptacle and at least one of the one or more hard disk drive integrated circuit chips.

Abstract: The present invention relates to a hard disk drive system having overvoltage protection circuits for various types of overvoltage conditions. For example, the system includes one or more hard disk drive integrated circuit chips residing on a board and a hard disk drive power plug receptacle residing on the board having two different value power supply ports associated therewith. The receptacle is operable to receive a power plug therein, wherein when the power plug is inserted therein in a proper orientation the two different value voltages are properly supplied to the one or more hard disk drive integrated circuit chips, and wherein when the power plug is inserted therein in an improper orientation the two different value voltages are switched with respect to their intended values.

Abstract: The present invention relates to a hard disk drive system having overvoltage protection circuits for various types of overvoltage conditions. For example, the system comprises one or more hard disk drive integrated circuit chips residing on a board and a hard disk drive power plug receptacle residing on the board having two different value power supply ports associated therewith. The receptacle is operable to receive a power plug therein, wherein when the power plug is inserted therein in a proper orientation the two different value voltages are properly supplied to the one or more hard disk drive integrated circuit chips, and wherein when the power plug is inserted therein in an improper orientation the two different value voltages are switched with respect to their intended values. The system comprises a reverse power plug orientation protection circuit coupled between the hard disk drive power plug receptacle and at least one of the one or more hard disk drive integrated circuit chips.

Abstract: The present invention relates to a hard disk drive system having overvoltage protection circuits for various types of overvoltage conditions. For example, the system comprises one or more hard disk drive integrated circuit chips residing on a board and a hard disk drive power plug receptacle residing on the board having two different value power supply ports associated therewith. The receptacle is operable to receive a power plug therein, wherein when the power plug is inserted therein in a proper orientation the two different value voltages are properly supplied to the one or more hard disk drive integrated circuit chips, and wherein when the power plug is inserted therein in an improper orientation the two different value voltages are switched with respect to their intended values. The system comprises a reverse power plug orientation protection circuit coupled between the hard disk drive power plug receptacle and at least one of the one or more hard disk drive integrated circuit chips.

Abstract: A power supply circuit for generating regulated voltages includes a storage circuit to store the voltages, a control circuit to control the level of stored voltage, and a pump circuit to shift the input voltage to a higher voltage. A shunt circuit to shunt inductor ringing.

Abstract: A driver (40) for supplying drive signals to a piezo element (48) of a milli-actuator device (21) in a mass data storage device (10) in a charge mode of operation has a first circuit (96, 98) for providing a charging current to a sense capacitor (58) in response to head position control signals. The first circuit is powered by a voltage supply (VM) that is referenced to a substrate potential, or a ground potential (AGND). A second circuit (104, 106) for mirroring a current in the first circuit at a predetermined mirror ratio (1x:Nx) to provide drive currents to the piezo element (48). The substrate potential may be, for example, an analog ground potential. If desired, the integrated circuit may also include a first switch (60) connected to selectively disable the first circuit (96, 98) a second switch (62) connected to selectively provide a feedback path from the second circuit (104, 106) to an input of the second circuit (104, 106).

Abstract: A circuit (10) for braking a polyphase dc motor (12) includes a circuit (38) for producing an output signal indicating that the motor has slowed at least to an actual rotational speed and a braking circuit (42-44, 26-28) to brake the motor (12) when the output signal indicates that the motor has slowed at least to an actual rotational speed. The circuit (38) for producing an output signal indicating that the motor (12) has slowed at least to an actual rotational speed includes a first counter (70) for counting pulses of a speed signal, which may be a standard tach signal. The first counter (70) produces a first output when the first counter (70) reaches a first predetermined pulse count. A second counter (72) counts clock pulses from a clock generator (48) to produce a second output when the second counter (72) reaches a second predetermined pulse count.

Abstract: A power supply circuit for generating regulated voltages includes a storage circuit to store the voltages, a control circuit to control the level of stored voltage, and a pump circuit to shift the input voltage to a higher voltage and detection circuit to disable current limit sensing from ending the charge cycle if the output regulated voltage is low.

Abstract: A power supply circuit for generating regulated voltages includes a storage circuit to store the voltages, a control circuit to control the level of stored voltage, and a pump circuit to shift the input voltage to a higher voltage and a detection circuit to disable the regulator if the output-regulated voltage is very low due to a connection fault.

Abstract: A power supply circuit for generating regulated voltages includes a storage circuit to store the voltages, a control circuit to control the level of stored voltage, and a pump circuit to shift the input voltage to a higher voltage.

Abstract: A driver (40) for supplying drive signals to a piezo element (48) of a milli-actuator device (21) in a mass data storage device (10) in a charge mode of operation has a first circuit (96,98) for providing a charging current to a sense capacitor (58) in response to head position control signals. The first circuit is powered by a voltage supply (VM) that is referenced to a substrate potential, or a ground potential (AGND). A second circuit (104, 106) for mirroring a current in the first circuit at a predetermined mirror ratio (1x:Nx) to provide drive currents to the piezo element (48). The substrate potential may be, for example, an analog ground potential. If desired, the integrated circuit may also include a first switch (60) connected to selectively disable the first circuit (96,98)a second switch (62) connected to selectively provide a feedback path from the second circuit (104, 106) to an input of the second circuit (104, 106).

Abstract: The present invention relates to a hard disk drive system having overvoltage protection circuits for various types of overvoltage conditions. For example, the system comprises one or more hard disk drive integrated circuit chips residing on a board and a hard disk drive power plug receptacle residing on the board having two different value power supply ports associated therewith. The receptacle is operable to receive a power plug therein, wherein when the power plug is inserted therein in a proper orientation the two different value voltages are properly supplied to the one or more hard disk drive integrated circuit chips, and wherein when the power plug is inserted therein in an improper orientation the two different value voltages are switched with respect to their intended values. The system comprises a reverse power plug orientation protection circuit coupled between the hard disk drive power plug receptacle and at least one of the one or more hard disk drive integrated circuit chips.

Abstract: A system for driving a hard disk drive spindle motor is disclosed. The system comprises a spindle motor control circuit (120) and a spindle motor power circuit (220). The system also includes at least one disk (22) attached to a rotatable spindle (21) and a spindle motor (400) which receives power signals from the spindle motor power circuit (220) and controls the rotation of the spindle (21). The spindle motor control circuit (120) comprises a multiplexor (127) which transmits either a pulse width modulation signal or a current control signal in response to a mode selection signal, and a spindle predriver (125) which receives the multiplexor output signal and transmits spindle motor control signals to the spindle motor power circuit (220).

Abstract: A method of driving a motor without initial back rotation includes the steps of identifying a rest position 22 of a storage medium 20, mapping the rest position of storage medium 20 to a motor drive sequence, and driving the motor with the motor drive sequence, thereby enabling motor start-up without back rotation. The method is applicable to unipolar and bipolar drive methods as well as inductive read type and magneto-resistive type heads.

Abstract: A control system (10) is provided which comprises a control circuit (12) and a driver circuit (14). The driver circuit (14) has a current reference circuit (36) which supplies a reference current (34) to an output current mirror circuit (32). The output current mirror circuit creates output currents which are proportional to the reference current (34). The reference current (34) represents a zero temperature coefficient.

Abstract: Accordingly, an integrated control circuit is provided that allows for a central current reference circuit that supplies a reference current signal that employ a zero temperature coefficient. This current reference signal can be proportionally mirrored to a variety of output drivers to allow for a driving of peripheral systems with exact current requirements. Due to the fact that the reference current will not exhibit substantial variation with respect to temperature, the variability in the current supplies to the output drivers is small. As such, the output drivers can be designed to minimize the waste of current and power dissipation in the integrated system. Said output driver circuit (38) provides an output current to a load through an output pin. A output current mirror formed of a plurality of bipolar transistors (180, 188, and 194) provides the output current responsive to a control signal T1.

Abstract: A phase-locked loop circuit having a charge pump and a voltage controlled oscillator which includes a phase/frequency comparator having a single circuit for operating in phase or frequency modes and which uses the discharge signal from the oscillator flip flop to trigger resetting of the input flip flop and which uses a one-shot in the phase compare mode for high frequency operation.