Abstract: A planarization composition is set forth for chemical mechanical planarization of dielectric layers for semiconductor manufacture. The composition comprises spherical silica particles having an average diameter of from 30 nm to about 400 nm, and a narrow range of particle sizes, wherein about 90% of the particles is within 20% of the average particle diameter. The composition includes a liquid carrier comprising up to about 9% alcohol and an amine hydroxide in the amount of about 0.2 to about 9% by weight. The pH of the composition is in the range of about 9 to about 11.5, and the remainder of the solution is water. The composition has low amounts of metal ions, and the composition is used for thinning, polishing and planarizing interlayer dielectric thin films, shallow trench isolation structures, and isolation of gate structures. The invention also comprises methods for using the planarization composition in the manufacture of semiconductor devices.

Abstract: A planarization composition is set forth in accordance with an embodiment of the invention. The composition comprises spherical silica particles having a weight average particle diameter which falls within the range from about 0.03&mgr; to about 2&mgr; and is monodisperse in that at least about 90 weight percent of the particles have a variation in particle diameter from the average particle diameter of no more than about ±20%. A liquid carrier comprising up to 20 weight percent ROH, and an amine hydroxide which is NR4OH or NR2NR3OH, where each R is HCH3, CH2CH3, C3H7 or C4H9, in the amount of 0.1 to 10 weight percent; an oxidizer which is in the amount from about 0.5% to 15% weight percent; an acid stabilizer for adjusting the pH to fall within a range from about 7.0 to about 0.5; and the remainder is water. The invention also relates to a thinning, polishing and planarizing apparatus and to a method for carrying out the thinning, polishing and planarizing operation.

Abstract: A planarization composition is set forth in accordance with an embodiment of the invention. The composition comprises spherical silica particles having a weight average particle diameter which falls within the range from about 0.03.mu. to about 2.mu. and is mono-disperse in that at least about 90 weight percent of the particles have a variation in particle diameter from the average particle diameter of no more than about .+-.20%. A liquid carrier comprising up to 20 weight percent ROH, and an amine hydroxide which is NR.sub.4 OH or NR.sub.2 NR.sub.3 OH, where each R is HCH.sub.3, CH.sub.2 CH.sub.3, C.sub.3 H.sub.7 or C.sub.4 H.sub.9, in the amount of 0.1 to 10 weight percent; an oxidizer which is in the amount from about 0.5% to 15% weight percent; an acid stabilizer for adjusting the pH to fall within a range from about 7.0 to about 0.5; and the remainder is water.

Abstract: A wafer polishing fixture is disclosed containing a first liquid film confined by a non-porous but flexible enclosure for distributing evenly the applied polishing forces across the surface of a wafer supported by the confined liquid. The fixture comprises a flexible, non-porous template with a pocket for receiving a wafer to be polished. A washer is placed between a carrier and the template pocket. A film of water fills the bottom of the pocket and is confined with the aid of the washer and by an overlying porous pad extending across the pocket and having a non-porous sheath facing the liquid. A second liquid film saturates and covers the upper surface of the pad. The wafer to be polished floats upon the second liquid film within the pocket.

Abstract: A method of forming a SOI integrated circuit includes defining thin silicon mesas by wet etching a device layer having the <100> orientation down to the underlying insulator so that the (111) crystal planes control the lateral etching, forming a nitride bottom polish stop in the bottom of the apertures by a low temperature CVD process, with nitride sidewalls on the (111) planes of the silicon mesas being susceptible to easy removal, so that no hard material is present during a chemical-mechanical polishing step to thin the device layer down to less than 1000 .ANG., and filling the apertures with a temporary layer of polysilicon to provide mechanical support to the edges of the device layer during the polishing operation.