Patents by Inventor James E. Doran
James E. Doran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8728713Abstract: A method for producing a measurement structure for measuring alignment of patterns formed in one or more layers of patternable material uses multiple exposure tools having different resolution limits and maximum expose field sizes. The measurement structure includes multiple complementary and coincident parts. An abutting field pattern is exposed and stitched in a layer of patternable material using a first exposure tool and a first mask. The abutting field pattern includes a first portion of the multiple complementary parts. A periphery pattern is exposed in the same layer or in a different layer of patternable material using a second exposure tool and a second mask. The periphery pattern includes a second portion of the multiple complementary parts. A maximum expose field of the first exposure tool is smaller than the maximum expose field of the second exposure tool.Type: GrantFiled: August 2, 2011Date of Patent: May 20, 2014Assignee: Truesense Imaging, Inc.Inventors: Robert P. Fabinski, Eric J. Meisenzahl, James E. Doran
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Patent number: 8728722Abstract: A method for producing a device in one or more layers of patternable material disposed over a substrate uses multiple exposure tools having different resolution limits and maximum expose field sizes. An abutting field pattern is exposed and stitched in one layer of patternable material using one exposure tool and a first mask. A periphery pattern is then exposed in the same layer or in a different layer of patternable material using a second exposure tool and a second mask. The maximum expose field of the first exposure tool is smaller than a size of the device while the maximum expose field of the second exposure tool is at least as large as, or larger, the size of the device so that the combination of the stitched abutting field pattern and the periphery pattern forms a complete pattern in the patternable material.Type: GrantFiled: August 2, 2011Date of Patent: May 20, 2014Assignee: Truesense Imaging, Inc.Inventors: Robert P. Fabinski, Eric J. Meisenzahl, James E. Doran, Joseph R. Summa
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Patent number: 8415175Abstract: A semiconductor wafer includes multiple dies and a die identification region adjacent to or on each die. The die identification region can include a wafer indicator and a pattern of die locations representing die locations on the wafer. A die identification marker is provided in each pattern of die locations in the die identification region specifying a location of a respective die on the wafer.Type: GrantFiled: June 15, 2011Date of Patent: April 9, 2013Assignee: Truesense Imaging, Inc.Inventors: Shen Wang, Robert P. Fabinski, James E. Doran, Laurel J. Pace, Eric J. Meisenzahl
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Patent number: 8415813Abstract: A semiconductor wafer includes multiple dies and a die identification region adjacent to or on each die. The die identification region can include a wafer indicator and a pattern of die locations representing die locations on the wafer. A die identification marker is provided in each pattern of die locations in the die identification region specifying a location of a respective die on the wafer.Type: GrantFiled: June 15, 2011Date of Patent: April 9, 2013Assignee: Truesense Imaging, Inc.Inventors: Shen Wang, Robert P. Fabinski, James E. Doran, Laurel J. Pace, Eric J. Meisenzahl
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Publication number: 20120322271Abstract: A semiconductor wafer includes multiple dies and a die identification region adjacent to or on each die. The die identification region can include a wafer indicator and a pattern of die locations representing die locations on the wafer. A die identification marker is provided in each pattern of die locations in the die identification region specifying a location of a respective die on the wafer.Type: ApplicationFiled: June 15, 2011Publication date: December 20, 2012Inventors: Shen Wang, Robert P. Fabinski, James E. Doran, Laurel J. Pace, Eric J. Meisenzahl
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Publication number: 20120319307Abstract: A semiconductor wafer includes multiple dies and a die identification region adjacent to or on each die. The die identification region can include a wafer indicator and a pattern of die locations representing die locations on the wafer. A die identification marker is provided in each pattern of die locations in the die identification region specifying a location of a respective die on the wafer.Type: ApplicationFiled: June 15, 2011Publication date: December 20, 2012Inventors: Shen Wang, Robert P. Fabinski, James E. Doran, Laurel J. Pace, Eric j. Meisenzahl
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Publication number: 20120082937Abstract: A method for producing a device in one or more layers of patternable material disposed over a substrate uses multiple exposure tools having different resolution limits and maximum expose field sizes. An abutting field pattern is exposed and stitched in one layer of patternable material using one exposure tool and a first mask. A periphery pattern is then exposed in the same layer or in a different layer of patternable material using a second exposure tool and a second mask. The maximum expose field of the first exposure tool is smaller than a size of the device while the maximum expose field of the second exposure tool is at least as large as, or larger, the size of the device so that the combination of the stitched abutting field pattern and the periphery pattern forms a complete pattern in the patternable material.Type: ApplicationFiled: August 2, 2011Publication date: April 5, 2012Inventors: Robert P. Fabinski, Eric J. Meisenzahl, James E. Doran
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Publication number: 20080138986Abstract: A method for forming a patterned target layer over a substrate uses a blanket target layer located over the substrate and a patterned mask layer located over the blanket target layer At least one mask layer pattern wit the patterned mask layer is treated with a charged particle beam to provide a dimensionally changed mask layer pattern within a dimensionally changed mask. The dimensionally changed mask is used as an etch mask when etching the blanket target layer to form the patterned target layer.Type: ApplicationFiled: December 6, 2006Publication date: June 12, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Lin Zhou, Eric Peter Solecky, James E. Doran
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Patent number: 6944578Abstract: A method uses three dimensional feature metrology for implementation of critical image control and feedback of lithographic focus and x/y tilt. The method is for measuring 3 dimensional profile changes in a photo sensitive film and feeding back compensatory exposure tool focus corrections to maintain a stable lithographic process. The measured focus change from the optimal tool focus offset is monitored directly on the critical product images for both contact hole and line images. Z Focus corrections and x/y tilt corrections are fed back independently of dose to maintain critical dimension (CD) control. Additionally, the method can be used to diagnose problems with the focusing system by measuring the relationship between line edge width and barometric pressure.Type: GrantFiled: June 15, 2004Date of Patent: September 13, 2005Assignee: International Business Machines CorporationInventors: Reginald R. Bowley, Jr., Vincent J. Carlos, James E. Doran, Stephen E. Knight, Robert K. Leidy, Keith J. Machia, Joseph E. Shaver, Dianne L. Sundling
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Patent number: 6917901Abstract: A method uses three dimensional feature metrology for implementation of critical image control and feedback of lithographic focus and x/y tilt. The method is for measuring 3 dimensional profile changes in a photo sensitive film and feeding back compensatory exposure tool focus corrections to maintain a stable lithographic process. The measured focus change from the optimal tool focus offset is monitored directly on the critical product images for both contact hole and line images. Z Focus corrections and x/y tilt corrections are fed back independently of dose to maintain critical dimension (CD) control thereby achieving improved semiconductor wafer printing. Additionally, the method can be used to diagnose problems with the focusing system by measuring the relationship between line edge width and barometric pressure.Type: GrantFiled: February 20, 2002Date of Patent: July 12, 2005Assignee: International Business Machines CorporationInventors: Reginald R. Bowley, Jr., Vincent J. Carlos, James E. Doran, Stephen E. Knight, Robert K. Leidy, Keith J. Machia, Joseph E. Shaver, Dianne L. Sundling
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Publication number: 20040267506Abstract: A method uses three dimensional feature metrology for implementation of critical image control and feedback of lithographic focus and x/y tilt. The method is for measuring 3 dimensional profile changes in a photo sensitive film and feeding back compensatory exposure tool focus corrections to maintain a stable lithographic process. The measured focus change from the optimal tool focus offset is monitored directly on the critical product images for both contact hole and line images. Z Focus corrections and x/y tilt corrections are fed back independently of dose to maintain critical dimension (CD) control thereby achieving improved semiconductor wafer printing. Additionally, the method can be used to diagnose problems with the focusing system by measuring the relationship between line edge width and barometric pressure.Type: ApplicationFiled: June 15, 2004Publication date: December 30, 2004Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Reginald R. Bowley, Vincent J. Carlos, James E. Doran, Stephen E. Knight, Robert K. Leidy, Keith J. Machia, Joseph E. Shaver, Dianne L. Sundling
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Publication number: 20030158710Abstract: A method uses three dimensional feature metrology for implementation of critical image control and feedback of lithographic focus and x/y tilt. The method is for measuring 3 dimensional profile changes in a photo sensitive film and feeding back compensatory exposure tool focus corrections to maintain a stable lithographic process. The measured focus change from the optimal tool focus offset is monitored directly on the critical product images for both contact hole and line images. Z Focus corrections and x/y tilt corrections are fed back independently of dose to maintain critical dimension (CD) control thereby achieving improved semiconductor wafer printing. Additionally, the method can be used to diagnose problems with the focusing system by measuring the relationship between line edge width and barometric pressure.Type: ApplicationFiled: February 20, 2002Publication date: August 21, 2003Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Reginald R. Bowley, Vincent J. Carlos, James E. Doran, Stephen E. Knight, Robert K. Leidy, Keith J. Machia, Joseph E. Shaver, Dianne L. Sundling