Abstract: A thermal controller includes a thermal control interface to receive test data from an automated test equipment (ATE) system and dynamically adjust a target setpoint temperature based on the data and a dynamic thermal controller to receive the target setpoint temperature from the thermal control interface and control a thermal actuator based on the target setpoint temperature.

Abstract: A thermal controller includes a thermal control interface to receive test data from an automated test equipment (ATE) system and dynamically adjust a target setpoint temperature based on the data and a dynamic thermal controller to receive the target setpoint temperature from the thermal control interface and control a thermal actuator based on the target setpoint temperature.

Abstract: A thermal controller includes a thermal control interface to receive test data from an automated test equipment (ATE) system and dynamically adjust a target setpoint temperature based on the data and a dynamic thermal controller to receive the target setpoint temperature from the thermal control interface and control a thermal actuator based on the target setpoint temperature.

Abstract: A thermal controller includes a thermal control interface to receive test data from an automated test equipment (ATE) system and dynamically adjust a target setpoint temperature based on the data and a dynamic thermal controller to receive the target setpoint temperature from the thermal control interface and control a thermal actuator based on the target setpoint temperature.

Abstract: A JTAG tester includes a JTAG controller in a PCI slot of a PC, a port multiplexer, a programmable power supply, and drive and compare logic, which tracks Vcc. The tester reads and blows information and configuration fuses on the silicon using the JTAG port. The tester pipes the JTAG port into a 1-to-N multiplexer, where N is the number of sockets being tested in parallel. The multiplexer is different from conventional multiplexers in that it allows selection of any combination of sockets, not just any one of the N sockets. Thus the same data can be driven into any combination of devices for parallel programming of fuse registers. Data being read out is read one device for separate evaluation via the single port back to the controller PC.

Abstract: Multiple devices can be tested simultaneously for power continuity or for other power performance characteristic(s). If any of the devices have short circuit defects, for example, the fuse devices connected between these defective devices and a single power supply restrict the amount of current drawn by the defective devices. This allows power continuity testing to continue for all of the other devices. At the same time, the reduced voltage level of the defective devices, caused by the restriction of current by their corresponding fuse device, can be detected by the voltage measurement device. The reduced voltage levels allow the defective devices to be identified by a test control apparatus and to be excluded from subsequent testing.

Abstract: Multiple devices can be tested simultaneously for power continuity or for other power performance characteristic(s). If any of the devices have short circuit defects, for example, the fuse devices connected between these defective devices and a single power supply restrict the amount of current drawn by the defective devices. This allows power continuity testing to continue for all of the other devices. At the same time, the reduced voltage level of the defective devices, caused by the restriction of current by their corresponding fuse device, can be detected by the voltage measurement device. The reduced voltage levels allow the defective devices to be identified by a test control apparatus and to be excluded from subsequent testing.

Abstract: Multiple devices can be tested simultaneously for power continuity or for other power performance characteristic(s). If any of the devices have short circuit defects, for example, the fuse devices connected between these defective devices and a single power supply restrict the amount of current drawn by the defective devices. This allows power continuity testing to continue for all of the other devices. At the same time, the reduced voltage level of the defective devices, caused by the restriction of current by their corresponding fuse device, can be detected by the voltage measurement device. The reduced voltage levels allow the defective devices to be identified by a test control apparatus and to be excluded from subsequent testing.

Abstract: A JTAG tester includes a JTAG controller in a PCI slot of a PC, a port multiplexer, a programmable power supply, and drive and compare logic, which tracks VCC. The tester reads and blows information and configuration fuses on the silicon using the JTAG port. The tester pipes the JTAG port into a 1-to-N multiplexer, where N is the number of sockets being tested in parallel. The multiplexer is different from conventional multiplexers in that it allows selection of any combination of sockets, not just any one of the N sockets. Thus the same data can be driven into any combination of devices for parallel programming of fuse registers. Data being read out is read one device for separate evaluation via the single port back to the controller PC.