Patents by Inventor James E. Schneider

James E. Schneider has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7182566
    Abstract: A fastener, such as a nail, screw, etc., which possesses supplemental support and/or retention capability is provided. The fastener includes an elongated auxiliary member secured interiorly to, exteriorly to, or along the shaft of the fastener. The auxiliary member is secured to the shaft at two or more portions of the shaft. The auxiliary member provides the shaft with additional support strength and/or enables fastened materials to be retained upon breakage or shearing of the shaft as a result of, for example, heavy tensile or shearing loads. To facilitate breakage or shearing of the shaft, the shaft may be provided with a deformation, such as a notch or reduced circumference, at one or more desired locations such that the shaft breaks or shears at the deformation(s), thereby allowing the auxiliary member to function as the sole member which retains the fastened materials.
    Type: Grant
    Filed: June 20, 2005
    Date of Patent: February 27, 2007
    Inventors: Charles Nelson, Matthew J. Esserman, James E. Schneider
  • Patent number: 7062602
    Abstract: The preferred embodiments described herein provide a method for reading data in a write-once memory device using a write-many file system. In one preferred embodiment, data traffic between a data storage device and a write-once memory device is redirected so that file system structures of a write-many file system do not overwrite previously-stored file system structures. Data traffic between the write-once storage device and a data reading device is also redirected so that a current file system structure of the write-many file system is provided to the data reading device instead of an out-of- date file system structure. In another preferred embodiment, a non-volatile write-many memory array is provided in the write-once memory device to store file system structures of a write-many file system.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: June 13, 2006
    Assignee: Matrix Semiconductor, Inc.
    Inventors: Christopher S. Moore, J. James Tringali, Roger W. March, James E. Schneider, Derek J. Bosch, Daniel C. Steere
  • Patent number: 7003619
    Abstract: The preferred embodiments described herein provide a memory device and method for storing and reading a file system structure in a write-once memory array. In one preferred embodiment, a plurality of bits representing a file system structure is inverted and stored in a write-once memory array. When the inverted plurality of bits is read from the memory array, the bits are inverted to provide the file system structure bits in their original, non-inverted configuration. With this preferred embodiment, a file system structure can be updated to reflect data stored in the memory array after the file system structure was written. Other preferred embodiments are provided, and each of the preferred embodiments described herein can be used alone or in combination with one another.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: February 21, 2006
    Assignee: Matrix Semiconductor, Inc.
    Inventors: Christopher S. Moore, James E. Schneider, J. James Tringali, Roger W. March
  • Patent number: 6996660
    Abstract: The preferred embodiments described herein provide a memory device and method for storing and reading data in a write-once memory array. In one preferred embodiment, a plurality of bits representing data is inverted and stored in a write-once memory array. When the inverted plurality of bits is read from the memory array, the bits are inverted to provide the data in its original, non-inverted configuration. By storing data bits in an inverted form, the initial, un-programmed digital state of the memory array is redefined as the alternative, programmed digital state. Other preferred embodiments are provided, and each of the preferred embodiments described herein can be used alone or in combination with one another. For example, the embodiments in which data bits are inverted can be used alone or in combination with the embodiments in which data is redirected.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: February 7, 2006
    Assignee: Matrix Semiconductor, Inc.
    Inventors: Christopher S. Moore, James E. Schneider, J. James Tringali, Roger W. March
  • Patent number: 6908275
    Abstract: A fastener, such as a nail, screw, etc., which possesses supplemental support and/or retention capability is provided. The fastener includes an elongated auxiliary member secured interiorly to, exteriorly to, or along the shaft of the fastener. The auxiliary member is secured to the shaft at two or more portions of the shaft. The auxiliary member provides the shaft with additional support strength and/or enables fastened materials to be retained upon breakage or shearing of the shaft as a result of, for example, heavy tensile or shearing loads. To facilitate breakage or shearing of the shaft, the shaft may be provided with a deformation, such as a notch or reduced circumference, at one or more desired locations such that the shaft breaks or shears at the deformation(s), thereby allowing the auxiliary member to function as the sole member which retains the fastened materials.
    Type: Grant
    Filed: April 29, 2002
    Date of Patent: June 21, 2005
    Inventors: Charles Nelson, Matthew J. Esserman, James E. Schneider
  • Patent number: 6711043
    Abstract: The preferred embodiments described herein provide a three-dimensional memory cache system. In one preferred embodiment, a modular memory device removably connectable to a host device is provided. The modular memory device comprises a substrate, a cache memory array, a three-dimensional primary memory array, and a modular housing. The cache memory array and the three-dimensional primary memory array can be on the same or separate substrates in the modular housing. In another preferred embodiment, an integrated circuit is provided comprising a substrate, a cache memory array in the substrate, and a three-dimensional primary memory array above the substrate. Other preferred embodiments are provided, and each of the preferred embodiments can be used alone or in combination with one another.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: March 23, 2004
    Assignee: Matrix Semiconductor, Inc.
    Inventors: David R. Friedman, J. James Tringali, Roy E. Scheuerlein, James E. Schneider, Christopher S. Moore, Daniel C. Steere
  • Publication number: 20030202861
    Abstract: A fastener, such as a nail, screw, etc., which possesses supplemental support and/or retention capability is provided. The fastener includes an elongated auxiliary member secured interiorly to, exteriorly to, or along the shaft of the fastener. The auxiliary member is secured to the shaft at two or more portions of the shaft. The auxiliary member provides the shaft with additional support strength and/or enables fastened materials to be retained upon breakage or shearing of the shaft as a result of, for example, heavy tensile or shearing loads. To facilitate breakage or shearing of the shaft, the shaft may be provided with a deformation, such as a notch or reduced circumference, at one or more desired locations such that the shaft breaks or shears at the deformation(s), thereby allowing the auxiliary member to function as the sole member which retains the fastened materials.
    Type: Application
    Filed: April 29, 2002
    Publication date: October 30, 2003
    Inventors: Charles Nelson, Matthew J. Esserman, James E. Schneider
  • Publication number: 20020167829
    Abstract: The preferred embodiments described herein provide a three-dimensional memory cache system. In one preferred embodiment, a modular memory device removably connectable to a host device is provided. The modular memory device comprises a substrate, a cache memory array, a three-dimensional primary memory array, and a modular housing. The cache memory array and the three-dimensional primary memory array can be on the same or separate substrates in the modular housing. In another preferred embodiment, an integrated circuit is provided comprising a substrate, a cache memory array in the substrate, and a three-dimensional primary memory array above the substrate. Other preferred embodiments are provided, and each of the preferred embodiments can be used alone or in combination with one another.
    Type: Application
    Filed: June 27, 2002
    Publication date: November 14, 2002
    Inventors: David R. Friedman, J. James Tringali, Roy E. Scheuerlein, James E. Schneider, Christopher S. Moore, Daniel C. Steere
  • Patent number: 5932966
    Abstract: An electron source includes a negative electron affinity photocathode on a light-transmissive substrate and a light beam generator for directing a light beam through the substrate at the photocathode for exciting electrons into the conduction band. The photocathode has at least one active area for emission of electrons with dimensions of less than about two micrometers. The electron source further includes electron optics for forming the electrons into an electron beam and a vacuum enclosure for maintaining the photocathode at high vacuum. The photocathode is patterned to define emission areas. A patterned mask may be located on the emission surface of the active layer, may be buried within the active layer or may be located between the active layer and the substrate.
    Type: Grant
    Filed: December 9, 1997
    Date of Patent: August 3, 1999
    Assignees: Intevac, Inc., Board of Trustees of the Leland Stanford Jr. University
    Inventors: James E. Schneider, Kenneth A. Costello, Mark A. McCord, R. Fabian Pease, Aaron W. Baum