Abstract: A system, apparatus, and method are directed to providing digital copy protection of media using a subscriber/publisher architecture. In one embodiment, a publisher employs various dynamic and/or static tamper detection, including, filter graph change detectors, ICE detectors, screen scraping detectors, debugger detectors, pattern recognizers, or the like. When a tampering event is detected by one or more of the publishers, the tamper event may be published for access by a subscriber. Published tamper events may be pushed to or pulled by the subscribers. When one or more subscribers receive the tamper event, the subscriber(s) may perform one or more tamper response actions according to various business rules, and/or other core rules.

Abstract: A system for using computer input devices with software applications is disclosed. The system includes an input device mapper API, which uses a language of semantics as an interface between input devices and software applications. The input device mapper receives information about which semantics the devices connected to the computer are able to implement, and which semantics correspond to actions that a user can request the software to perform. The input device mapper maps controls on the available devices into user-requestable software actions by matching, as closely as possible, device controls and software actions that correspond to the same semantic. The system thus makes input devices and software applications transparent to each other, and permits a software application to be designed to operate without regard to which input device is being used to control its actions.

Abstract: A system for using computer input devices with software applications is disclosed. The system includes an input device mapper API, which uses a language of semantics as an interface between input devices and software applications. The input device mapper receives information about which semantics the devices connected to the computer are able to implement, and which semantics correspond to actions that a user can request the software to perform. The input device mapper maps controls on the available devices into user-requestable software actions by matching, as closely as possible, device controls and software actions that correspond to the same semantic. The system thus makes input devices and software applications transparent to each other, and permits a software application to be designed to operate without regard to which input device is being used to control its actions.

Abstract: A computer peripheral has a processor, non-volatile memory, and a plurality of controls. The non-volatile memory holds control mappings corresponding to a plurality of application program genres. The control mappings indicate actions to be performed in application programs of particular genres in response to actuation of particular controls. The control mappings indicate controls by unique string indexes that are also used in HID control descriptors associated with the computer peripheral.

Abstract: A system for using computer input devices with software applications is disclosed. The system includes an input device mapper, which uses a language of semantics as an interface between input devices and software applications. The input device mapper receives information about which semantics the devices connected to the computer are able to implement, and which semantics correspond to actions that a user can request the software to perform. The input device mapper maps controls on the available devices into user-requestable software actions by matching, as closely as possible, device controls and software actions that correspond to the same semantic. An input device manager employing the disclosed input device mapper translates device operation events into the software's input dialect to direct the software to perform the action into which an operated control has been mapped.

Abstract: A system for managing space in a computer memory is disclosed. The system creates free space in a computer memory by using a “downsize” operation, which selectively removes data from a data object residing in the memory. Each data object in the memory provides a downsize operation designed for that data object, which reduces the amount of space that the data object occupies in the memory by deleting data that can be recreated from another source, or data that is not essential to the function of the data object. Each data object may also provide a “restore” operation, which returns the object to a usable state in the memory by replacing data in the memory that has been removed by a prior downsize operation. The restore operation is used if an attempt is made to access the data object after it has been downsized. The system can be used to manage various types of memory containing various types of data objects.

Abstract: An application manager and application programming interface (API) for managing an install operation, a downsize operation, a reinstall operation, and an uninstall operation are disclosed. A method of communicating between the application manager and an application to perform these operations comprises the following steps: receiving from the application a call to set a property related to performing an application installation operation; receiving from the application a call to initialize an application installation operation; and receiving from the application a call to finalize the application installation operation.

Abstract: A gsprite engine circuit reads a display list identifying gsprite image layers to be composited for display, retrieves gsprite image data from an external memory, and transforms the gsprite data to display device coordinates. The gsprite image layers represent independently rendered graphical objects in a graphics scene. The gsprite engine can simulate the motion of the graphical objects in a sequence of display images by performing affine transformations on the gsprite image layers. The interface to the gsprite engine circuit includes the display list and gsprite header blocks. The display list enumerates the gsprites to be composited as a display image. The header blocks describe a gsprite transform, which can be an affine transform, used to transform gsprites to display device coordinates. The header blocks also provide an array of references to image blocks or "chunks" comprising the gsprite.

Abstract: A display controller, implemented in software or hardware, maintains the primary display image visible on a computer monitor in compressed subregions or chunks. The controller emulates a conventional frame buffer by making the compressed image appear as if it has a linear address space. Most of the image is compressed and the remainder is selectively decompressed and cached to satisfy read and write requests. To display the image, the controller decompresses the display image's constituent subregions and buffers the decompressed data so that it can be scanned out to a display monitor.

Abstract: A graphics rendering chip serially renders a stream of geometric primitives to image regions called chunks. A set-up processor in the chip parses rendering commands and the stream of geometric primitives and computes edge equation parameters. A scan-convert processor receives the edge equation parameters from the set-up processor and scan converts the geometric primitives to produce pixel records and fragment records. An internal, double-buffered pixel buffer stores pixel records for fully covered pixel addresses and also stores references to fragment lists stored in a fragment buffer. A pixel engine performs hidden surface removal and controls storage of pixel and fragment records to the pixel and fragment buffers, respectively. An anti-aliasing engine resolves pixel data for one pixel buffer while the pixel engine fills the other pixel buffer with pixel data for the next chunk.

Abstract: A system for accessing texture data in a graphics rendering system allows texture data to be stored in memories with high latency or in a compressed format. The system utilizes a texture cache to temporarily store blocks of texture data retrieved from an external memory during rendering operations. In one implementation, geometric primitives are stored in a queue long enough to absorb the latency of fetching and possibly decompressing a texture block. The geometric primitives are converted into texture block references, and these references are used to fetch texture blocks from memory. A rasterizer rasterizes each geometric primitives as the necessary texture data becomes available in the texture cache. In another implementation, geometric primitives are converted into pixels, including a pixel address, color data, and a texture request. These pixels are stored in a queue long enough to absorb the latency of a texture block fetch.

Abstract: A technique for starting up a data processing system in which a "basic" or "kernel" instruction set is stored in an auxiliary store and transferred to the processor's control store in start-up. The kernel instruction set in used to execute an initialization program which identifies an I/O device in which a microcode local program and a desired microcode file are stored. No microcode load program is transferred to the processor's main memory, using the kernel instructions and the desired microcode file is then transferred in selected blocks from the I/O device to the main memory and there to the microcode control store. The microinstructions of the desired microcode file then can be used to load appropriate operating system software so that the overall processor is then ready for use in whatever applications are desirable.

Abstract: A data processing system having separate kernel, vertical and horizontal microcode, separate loading of vertical microcode and a permanently resident kernel microcode, and a soft console with dual levels of capability. The system includes a processor having dual ALC and microcode processors, and an instruction processor. Also included are a processor incorporating a multifunction processor memory, a malfunction nibble shifter, and a high speed look-aside memory control.

Abstract: A data processing system which handles thirty-two bit logical addresses which can be derived from either sixteen bit logical addresses or thirty-two bit logical addresses, the latter being translated into physical addresses by unique translation means. The system includes means for decoding macro-instructions of both a basic and an extended instruction set, each macro-instruction containing in itself selected bit patterns which uniquely identify which type of instruction is to be decoded. The decoded macro-instructions provide the starting address of one or more micro-instructions, which address is supplied to a unique micro-instruction sequencing unit which appropriately decodes a selected field of each micro-instruction to obtain each successive micro-instruction. The system uses hierarchical memory storage using eight storage segments (rings), access to the rings being controlled in a privileged manner according to different level of privilege.