Patents by Inventor James Edward Rezek

James Edward Rezek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6889370
    Abstract: Methods and apparatus for efficiently identifying, selecting and aligning cells within a circuit design are disclosed. Preferably, a net or group-of nets is first identified by the circuit designer. Then, selected cells that are connected to the selected net or group of nets are identified by the placement tool. A qualification or filter may be provided for filtering which cells are selected. For example, the filter may allow only those cells that are source cells, destination cells, placed cells, unplaced cells, etc., or any combination thereof to be selected. The selected cells may be aligned in a direction of an alignment axis, if desired.
    Type: Grant
    Filed: June 20, 2000
    Date of Patent: May 3, 2005
    Assignee: Unisys Corporation
    Inventors: Joseph Peter Kerzman, James Edward Rezek
  • Publication number: 20040128638
    Abstract: Methods and apparatus for efficiently identifying, selecting and aligning cells within a circuit design are disclosed. Preferably, a net or group of nets is first identified by the circuit designer. Then, selected cells that are connected to the selected net or group of nets are identified by the placement tool. A qualification or filter may be provided for filtering which cells are selected. For example, the filter may allow only those cells that are source cells, destination cells, placed cells, unplaced cells, etc., or any combination thereof to be selected. The selected cells may be aligned in a direction of an alignment axis, if desired.
    Type: Application
    Filed: December 16, 2003
    Publication date: July 1, 2004
    Inventors: Joseph Peter Kerzman, James Edward Rezek
  • Patent number: 6546532
    Abstract: Method and apparatus for efficiently traversing and placing cells in a circuit design database are disclosed. In one illustrative embodiment, one or more leaf cells are identified as base objects. The base objects are placed and aligned along a selected dominate axis. Once the base objects are identified, an input port is identified by the circuit designer. In many cases, selected base objects will have at least one common input port name, such as “A”. By selecting a common input port name, the corresponding input port for each of the selected base objects is identified. Once identified, the source leaf cells that have an output port that is coupled to the identified input ports can be identified, placed and aligned as desired.
    Type: Grant
    Filed: June 20, 2000
    Date of Patent: April 8, 2003
    Assignee: Unisys Corporation
    Inventors: Joseph Peter Kerzman, James Edward Rezek