Patents by Inventor James F. Garvin, Jr.

James F. Garvin, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for producing wafer notches with rounded corners and a tool therefor
    Patent number: 6572461
    Abstract: A semiconductor wafer for use in the fabrication of semiconductor devices which includes a circular wafer (13) of semiconductor material having a perimeter and a notch (11) having a wall disposed in the wafer and extending to the perimeter which includes a preferably rounded apex (5) interior of the perimeter and a pair of rounded intersections (7, 9) between the wall and the perimeter. The notch is formed with a tool (23) for forming rounded corners in the semiconductor wafer which includes a body of a material having a hardness greater than the semiconductor wafer which has a generally rounded or paraboloidally shaped front portion having a forwardmost tip (25) portion and a wing portion (27) extending outwardly from the body and having a taper narrowing in the direction of the forwardmost tip portion. The wing portion can be one or more spaced apart wing members or the wing portion can be a single member which extends completely around the tool axis.
    Type: Grant
    Filed: February 13, 2001
    Date of Patent: June 3, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Richard L. Guldi, James F. Garvin, Jr., Moitreyee Mukerjee-Roy
  • Method for producing wafers with rounded corners in the notches used for alignment in the fabrication of semiconductor devices
    Patent number: 6448154
    Abstract: A semiconductor wafer for use in the fabrication of semiconductor devices which includes a circular wafer (13) of semiconductor material having a perimeter and a notch (11) having a wall disposed in the wafer and extending to the perimeter which includes a preferably rounded apex (5) interior of the perimeter and a pair of rounded intersections (7, 9) between the wall and the perimeter. The notch is formed with a tool (23) for forming rounded corners in the semiconductor wafer which includes a body of a material having a hardness greater than the semiconductor wafer which has a generally rounded or paraboloidally shaped front portion having a forwardmost tip (25) portion and a wing portion (27) extending outwardly from the body and having a taper narrowing in the direction of the forwardmost tip portion. The wing portion can be one or more spaced apart wing members or the wing portion can be a single member which extends completely around the tool axis.
    Type: Grant
    Filed: April 9, 1999
    Date of Patent: September 10, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Richard L. Guldi, James F. Garvin, Jr., Moitreyee Mukerjee-Roy
  • Method of forming contacts and vias in semiconductor
    Patent number: 5998296
    Abstract: A method of filling openings (20, 50) in a semiconductor (10, 40) includes the steps of first forming a fill metal layer (30, 60) over the semiconductor which substantially covers the openings (20, 50). Thereafter, a surface coating (32, 62, 64) of a predetermined material is formed over the fill metal layer (30, 60). Then, high pressure is applied on the surface coating (32, 62, 64) to force the fill metal into the openings (20, 50). Metal film surface cracks previously plaguing force-fill processes are thereby eliminated or substantially reduced.
    Type: Grant
    Filed: April 16, 1997
    Date of Patent: December 7, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Mukul Saran, James F. Garvin, Jr., Wei-Yung Hsu