Patents by Inventor James F. Moseman

James F. Moseman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6046487
    Abstract: Disclosed is an improved process and liner for trench isolation which includes either a single oxynitride layer or a dual oxynitride (or oxide)/nitride layer. Such a process and liner has an improved process window as well as being an effective O.sub.2 diffusion barrier and resistant to hot phosphoric and hydrofluoric acids.
    Type: Grant
    Filed: December 12, 1997
    Date of Patent: April 4, 2000
    Assignee: International Business Machines Corporation
    Inventors: John Preston Benedict, David Mark Dobuzinsky, Philip Lee Flaitz, Erwin N. Hammerl, Herbert Ho, James F. Moseman, Herbert Palm, Seiko Yoshida, Hiroshi Takato
  • Patent number: 5763315
    Abstract: Disclosed is an improved process and liner for trench isolation which includes either a single oxynitride layer or a dual oxynitride (or oxide)/nitride layer. Such a process and liner has an improved process window as well as being an effective O.sub.2 diffusion barrier and resistant to hot phosphoric and hydrofluoric acids.
    Type: Grant
    Filed: January 28, 1997
    Date of Patent: June 9, 1998
    Assignees: International Business Machines Corporation, Siemens Aktiengesellschaft, Kabushiki Kaisha Toshiba
    Inventors: John Preston Benedict, David Mark Dobuzinsky, Philip Lee Flaitz, Erwin N. Hammerl, Herbert Ho, James F. Moseman, Herbert Palm, Seiko Yoshida, Hiroshi Takato
  • Patent number: 5747866
    Abstract: Silicon integrated circuits use a crystalline layer of silicon nitride (Si.sub.3 N.sub.4) in shallow trench isolation (STI) structures as an O.sub.2 -barrier film. The crystalline Si.sub.3 N.sub.4 lowers the density of electron traps as compared with as-deposited, amorphous Si.sub.3 N.sub.4. Further, a larger range of low-pressure chemical-vapor deposited (LPCVD) Si.sub.3 N.sub.4 films can be deposited, providing a larger processing window for thickness controllability. An LPCVD-Si.sub.3 N.sub.4 film is deposited at temperatures of 720.degree. C. to 780.degree. C. The deposited film is in an amorphous state. Subsequently, a high-temperatures rapid-thermal anneal in pure nitrogen or ammonia is conducted at 1050.degree. C. to 1100.degree. for 60 seconds.
    Type: Grant
    Filed: January 21, 1997
    Date of Patent: May 5, 1998
    Assignee: Siemens Aktiengesellschaft
    Inventors: Herbert Ho, Erwin Hammerl, David M. Dobuzinsky, Herbert Palm, Stephen Fugardi, Atul Ajmera, James F. Moseman, Samuel C. Ramac
  • Patent number: 5643823
    Abstract: Silicon integrated circuits use a crystalline layer of silicon nitride (Si.sub.3 N.sub.4) in shallow trench isolation (STI) structures as an O.sub.2 -barrier film. The crystalline Si.sub.3 N.sub.4 lowers the density of electron traps as compared with as-deposited, amorphous Si.sub.3 N.sub.4. Further, a larger range of low-pressure chemical-vapor deposited (LPCVD) Si.sub.3 N.sub.4 films can be deposited, providing a larger processing window for thickness controllability. An LPCVD-Si.sub.3 N.sub.4 film is deposited at temperatures of 720.degree. C. to 780.degree. C. The deposited film is in an amorphous state. Subsequently, a high-temperatures rapid-thermal anneal in pure nitrogen or ammonia is conducted at 1050.degree. C. to 1100.degree. C. for 60 seconds.
    Type: Grant
    Filed: September 21, 1995
    Date of Patent: July 1, 1997
    Assignees: Siemens Aktiengesellschaft, International Business Machines Corporation
    Inventors: Herbert Ho, Erwin Hammerl, David M. Dobuzinsky, J. Herbert Palm, Stephen Fugardi, Atul Ajmera, James F. Moseman, Samuel C. Ramac