Abstract: A housing for an integrated circuit, comprising a base for securing a substrate with an integrated circuit thereon, a top cover, and a body with a cavity for receiving the substrate and at least a portion of the top cover therein to form an enclosed housing therewith, the body including at least one connector extending from within the cavity to outside of the body and configured to contact the integrated circuit when the substrate is in the cavity.

Abstract: A housing for an integrated circuit, comprising a base for securing a substrate with an integrated circuit thereon, a top cover, and a body with a cavity for receiving the substrate and at least a portion of the top cover therein to form an enclosed housing therewith, the body including at least one connector extending from within the cavity to outside of the body and configured to contact the integrated circuit when the substrate is in the cavity.

Abstract: Methods for the design and fabrication of micro-electro-mechanical switches are disclosed. Two different switch designs with three different switch fabrication techniques are presented for a total of six switch structures. Each switch has a multiple-layer armature with a suspended biasing electrode and a conducting transmission line affixed to the structural layer of the armature. A conducting dimple is connected to the conducting line to provide a reliable region of contact for the switch. The switch is fabricated using silicon nitride as the armature structural layer and silicon dioxide as the sacrificial layer supporting the armature during fabrication. Hydrofluoric acid is used to remove the silicon dioxide layer with post-processing in a critical point dryer to increase yield.

Abstract: A low cost highly integrated method of fabricating a heat sink on the backside of a power semiconductor device maintains device performance, improves thermal transfer, and enables reliable planar connections without having to dice the wafer or package the discrete device-heat sink assembly. An etch stop layer is formed between the wafer and the frontside power devices to protect them during backside processing and to reduce the contact resistance between the device and its heat sink. The heat sinks are formed by thinning, patterning and then plating the wafer in such a manner that the devices can be released without dicing. The heat sinks are preferably oversized so that a vacuum tool can grasp the heat sink from above without damaging the device and then compression bond the heat sink onto a planar microstrip circuit assembly, which is designed and packaged to facilitate easy replacement of failed devices.

Abstract: A method for producing topographic projections, especially useful for producing many small projections of less than about 100 &mgr;m in diameter and in height. This method is useful for making contact pads of membrane probes used to test integrated circuits and spacers of liquid crystal light valves.

Abstract: A low cost highly integrated method of fabricating a heat sink on the backside of a power semiconductor device maintains device performance, improves thermal transfer, and enables reliable planar connections without having to dice the wafer or package the discrete device-heat sink assembly. An etch stop layer is formed between the wafer and the frontside power devices to protect them during backside processing and to reduce the contact resistance between the device and its heat sink. The heat sinks are formed by thinning, patterning and then plating the wafer in such a manner that the devices can be released without dicing. The heat sinks are preferably oversized so that a vacuum tool can grasp the heat sink from above without damaging the device and then compression bond the heat sink onto a planar microstrip circuit assembly, which is designed and packaged to facilitate easy replacement of failed devices.

Abstract: Methods for the design and fabrication of micro-electro-mechanical switches are disclosed. Two different switch designs with three different switch fabrication techniques are presented for a total of six switch structures. Each switch has a multiple-layer armature with a suspended biasing electrode and a conducting transmission line affixed to the structural layer of the armature. A conducting dimple is connected to the conducting line to provide a reliable region of contact for the switch. The switch is fabricated using silicon nitride as the armature structural layer and silicon dioxide as the sacrificial layer supporting the armature during fabrication. Hydrofluoric acid is used to remove the silicon dioxide layer with post-processing in a critical point dryer to increase yield.

Abstract: A method for fabricating resilient z-axis contacts to electrically interconnect IC wafers or MCMs in 3-D integrated circuits uses photolithography to provide larger carrier sizes, higher contact densities by decreasing the spacing, smaller contact footpads, and precise control of the contact's shape and position. The contacts are fabricated by forming photoresist patterns on the carrier's top and bottom surfaces that are initially rectangular, and then reflowing the photoresist materials to provide smooth surfaces suitable for forming the metal contacts, and depositing metal layers over the respective patterns. Second photoresist patterns are formed over respective metal layers to conform with the contact's shape, the metal is etched away according to the pattern, and the photoresists are removed such that the remaining metalization forms a resilient z-axis contact that is attached to the carrier and extends therefrom with a predetermined shape.