Patents by Inventor James G. Cotronakis

James G. Cotronakis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated passive device with a high resistivity substrate and method for forming the same
    Patent number: 7935607
    Abstract: According to one aspect of the present invention, a method of forming a microelectronic assembly, such as an integrated passive device (IPD) (72), is provided. An insulating dielectric layer (32) having a thickness (36) of at least 4 microns is formed over a silicon substrate (20). At least one passive electronic component (62) is formed over the insulating dielectric layer (32).
    Type: Grant
    Filed: April 9, 2007
    Date of Patent: May 3, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jonathan K. Abrokwah, Keri L. Costello, James G. Cotronakis, Terry K. Daly, Jason R. Fender, Adolfo G. Reyes
  • INTEGRATED PASSIVE DEVICE AND METHOD WITH LOW COST SUBSTRATE
    Publication number: 20090236689
    Abstract: According to one aspect of the present invention, a method of forming a microelectronic assembly, such as an integrated passive device (72), is provided. An insulating initial dielectric layer (32) comprising charge trapping films of, for example, aluminum nitride or silicon nitride or silicon oxide or a combination thereof, is formed over a silicon substrate (20). At least one passive electronic component (62) is formed over the initial dielectric layer (32). In an embodiment where silicon nitride or oxide is used in the initial dielectric layer (32) in contact with the silicon substrate (20), it is desirable to pre-treat the silicon surface (22) by exposing it to a surface damage causing treatment (e.g. an argon plasma) prior to depositing the initial dielectric layer, to assist in providing carrier depletion near the silicon surface around zero bias. RF loss in integrated passive devices using such silicon substrates is equal or lower than that obtained with GaAs substrates.
    Type: Application
    Filed: March 24, 2008
    Publication date: September 24, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Terry K. Daly, Keri L. Costello, James G. Cotronakis, Jason R. Fender, Jeff S. Hughes, Agni Mitra, Adolfo C. Reyes
  • INTEGRATED PASSIVE DEVICE WITH A HIGH RESISTIVITY SUBSTRATE AND METHOD FOR FORMING THE SAME
    Publication number: 20080246114
    Abstract: According to one aspect of the present invention, a method of forming a microelectronic assembly, such as an integrated passive device (IPD) (72), is provided. An insulating dielectric layer (32) having a thickness (36) of at least 4 microns is formed over a silicon substrate (20). At least one passive electronic component (62) is formed over the insulating dielectric layer (32).
    Type: Application
    Filed: April 9, 2007
    Publication date: October 9, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Jonathan K. Abrokwah, Keri L. Costello, James G. Cotronakis, Terry K. Daly, Jason R. Fender, Adolfo C. Reyes