Patents by Inventor James Gupta

James Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10033160
    Abstract: An interband cascade (IC) light emitting device comprising a plurality of interband cascade stages, wherein at least one of the IC stages is constructed to have an electron injector made of one or more QWs, a type-I quantum well (QW) active region, a barrier layer positioned between the active region and the electron injector, a hole injector made of one or more QWs, and a barrier layer positioned between the active region and the hole injector. In at least one embodiment, a type II heterointerface layer is between the electron injector and an adjacent hole injector. The well layer of the type-I QW active region has compressive strain, while the barrier layers which flank the type-I QW active region comprise tensile strain layers. In certain embodiments, the electron injector and the hole injector comprise tensile strained layers.
    Type: Grant
    Filed: October 4, 2016
    Date of Patent: July 24, 2018
    Assignees: The Board of Regents of the University of Oklahoma, National Research Council of Canada
    Inventors: Rui Q. Yang, James A. Gupta
  • Publication number: 20170125979
    Abstract: An interband cascade (IC) light emitting device comprising a plurality of interband cascade stages, wherein at least one of the IC stages is constructed to have an electron injector made of one or more QWs, a type-I quantum well (QW) active region, a barrier layer positioned between the active region and the electron injector, a hole injector made of one or more QWs, and a barrier layer positioned between the active region and the hole injector. In at least one embodiment, a type II heterointerface layer is between the electron injector and an adjacent hole injector. The well layer of the type-I QW active region has compressive strain, while the barrier layers which flank the type-I QW active region comprise tensile strain layers. In certain embodiments, the electron injector and the hole injector comprise tensile strained layers.
    Type: Application
    Filed: October 4, 2016
    Publication date: May 4, 2017
    Inventors: Rui Q. Yang, James A. Gupta
  • Publication number: 20040156164
    Abstract: The use of doped or undoped rare-earth silicates, according to the formula MSixOy wherein M is a rare-earth element, in semiconductor technology is disclosed. In particular, gadolinium silicate as a gate dielectric of a metal-insulating-semiconductor device is disclosed. The insulator of the metal-insulating-semiconductor device is fabricated by exposing a suitably cleaned and terminated surface of a semiconductor substrate to a simultaneous or sequential flux of rare-earth atoms, silicon atoms and oxygen atoms, and annealing the resulting rare-earth containing layer. The use of higher dielectric constant material, such as provided by the invention, reduces the tunneling current through the device, since layers of greater thickness can be used.
    Type: Application
    Filed: February 11, 2004
    Publication date: August 12, 2004
    Applicant: National Research Council of Canada
    Inventors: Dolf Landheer, James Gupta
  • Patent number: 6700171
    Abstract: The use of doped or undoped rare-earth silicates, according to the formula MSixOy wherein M is a rare-earth element, in semiconductor technology is disclosed. In particular, gadolinium silicate as a gate dielectric of a metal-insulating-semiconductor device is disclosed. The insulator of the metal-insulating-semiconductor device is fabricated by exposing a suitably cleaned and terminated surface of a semiconductor substrate to a simultaneous or sequential flux of rare-earth atoms, silicon atoms and oxygen atoms, and annealing the resulting rare-earth containing layer. The use of higher dielectric constant material, such as provided by the invention, reduces the tunneling current through the device, since layers of greater thickness can be used.
    Type: Grant
    Filed: October 29, 2001
    Date of Patent: March 2, 2004
    Assignee: National Research Council of Canada
    Inventors: Dolf Landheer, James Gupta
  • Publication number: 20020050608
    Abstract: The use of doped or undoped rare-earth silicates, according to the formula MSixOy wherein M is a rare-earth element, in semiconductor technology is disclosed. In particular, gadolinium silicate as a gate dielectric of a metal-insulating-semiconductor device is disclosed. The insulator of the metal-insulating-semiconductor device is fabricated by exposing a suitably cleaned and terminated surface of a semiconductor substrate to a simultaneous or sequential flux of rare-earth atoms, silicon atoms and oxygen atoms, and annealing the resulting rare-earth containing layer. The use of higher dielectric constant material, such as provided by the invention, reduces the tunneling current through the device, since layers of greater thickness can be used.
    Type: Application
    Filed: October 29, 2001
    Publication date: May 2, 2002
    Inventors: Dolf Landheer, James Gupta